| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsNaClELFStreamer.cpp | 158 bool IsStore = false; in emitInstruction() local
211 bool *IsStore) { in isBasePlusOffsetMemoryAccess()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARC/ |
| H A D | ARCOptAddrMode.cpp | 395 bool IsStore = Ldst->mayStore(); in canHoistLoadStoreTo() local
423 bool IsStore = Ldst->mayStore(); in canSinkLoadStoreTo() local
444 bool IsStore = Ldst.mayStore(); in changeToAddrMode() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/ |
| H A D | M68kCollapseMOVEMPass.cpp | 204 bool IsStore = false) { in ProcessMI()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.cpp | 931 bool IsStore = MI->mayStore(); in spillVGPRtoAGPR() local
956 bool IsStore = MI->mayStore(); in buildMUBUFOffsetLoadStore() local
989 bool IsStore = TII->get(LoadStoreOp).mayStore(); in getFlatScratchSpillOpcode() local
1035 bool IsStore = Desc->mayStore(); in buildSpillLoadStore() local
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| H A D | AMDGPULegalizerInfo.cpp | 1082 const bool IsStore = Op == G_STORE; in AMDGPULegalizerInfo() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCVSXSwapRemoval.cpp | 75 unsigned int IsStore : 1; member
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| /netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/ |
| H A D | X86FoldTablesEmitter.cpp | 104 bool IsStore = false; member in __anonf4dbc8260111::X86FoldTablesEmitter::X86FoldTableEntry
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | Thumb2SizeReduction.cpp | 466 bool IsStore = Entry.WideOpc == ARM::t2STR_POST; in ReduceLoadStore() local
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| H A D | ARMLoadStoreOptimizer.cpp | 500 bool IsStore = in UpdateBaseRegUses() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonExpandCondsets.cpp | 823 bool IsLoad = TheI.mayLoad(), IsStore = TheI.mayStore(); in canMoveMemTo() local
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| H A D | HexagonConstExtenders.cpp | 1146 bool IsStore = MI.mayStore(); in recordExtender() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86MCInstLower.cpp | 376 bool IsStore = Inst.getOperand(0).isReg() && Inst.getOperand(1).isReg(); in SimplifyShortMoveForm() local
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| H A D | X86TargetTransformInfo.cpp | 3441 bool IsStore = (Instruction::Store == Opcode); in getMaskedMemoryOpCost() local
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| /netbsd-src/external/apache2/llvm/dist/clang/lib/CodeGen/ |
| H A D | CGAtomic.cpp | 1288 bool IsStore = E->getOp() == AtomicExpr::AO__c11_atomic_store || in EmitAtomicExpr() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 915 bool IsStore = Opcode == TargetOpcode::G_STORE; in applyCombineIndexedLoadStore() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 2636 bool IsStore = I.getOpcode() == TargetOpcode::G_STORE; in select() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 14846 bool IsStore = false; in performNEONPostLDSTCombine() local
|