| /llvm-project/llvm/lib/ObjectYAML/ |
| H A D | XCOFFYAML.cpp | 258 static void auxSymMapping(IO &IO, XCOFFYAML::CsectAuxEnt &AuxSym, bool Is64) { in auxSymMapping()
280 static void auxSymMapping(IO &IO, XCOFFYAML::BlockAuxEnt &AuxSym, bool Is64) { in auxSymMapping()
290 bool Is64) { in auxSymMapping()
324 const bool Is64 = in mapping() local
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| H A D | ELFYAML.cpp | 1307 const bool Is64 = static_cast<ELFYAML::Object *>(Ctx)->Header.Class == input() local
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| /llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| H A D | PPCAsmBackend.cpp | 224 return createPPCELFObjectWriter(Is64, OSABI); in createObjectTargetWriter() local
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| /llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsELFObjectWriter.cpp | 214 MipsELFObjectWriter(uint8_t OSABI,bool HasRelocationAddend,bool Is64) MipsELFObjectWriter() argument
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| /llvm-project/llvm/lib/ObjCopy/COFF/ |
| H A D | COFFObject.h | 103 bool Is64 = false; member
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| /llvm-project/llvm/tools/llvm-objdump/ |
| H A D | COFFDump.cpp | 60 bool Is64; member in __anon4ecf40f90111::COFFDumper
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| H A D | MachODump.cpp | 7879 bool Is64 = Obj->is64Bit(); printMachOCompactUnwindSection() local
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| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 277 getLogicalBitOpcode(unsigned Opc,bool Is64) getLogicalBitOpcode() argument
299 bool Is64 = Size > 32 || (DstRB->getID() == AMDGPU::VCCRegBankID && selectG_AND_OR_XOR() local
1408 const bool Is64 = Size == 64; selectBallot() local
1986 const bool Is64 = MRI->getType(VDataOut).getSizeInBits() == 64; selectImageIntrinsic() local
2865 const bool Is64 = STI.isWave64(); selectG_BRCOND() local
3077 const bool Is64 = DstTy.getSizeInBits() == 64; selectG_EXTRACT_VECTOR_ELT() local
[all...] |
| H A D | AMDGPURegisterBankInfo.cpp | 895 bool Is64 = OpSize % 64 == 0; in executeInWaterfallLoop() local
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| H A D | AMDGPULegalizerInfo.cpp | 6947 const bool Is64 = MRI.getType(NodePtr).getSizeInBits() == 64; legalizeBVHIntrinsic() local
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| H A D | SIISelLowering.cpp | 9172 const bool Is64 = NodePtr.getValueType() == MVT::i64; LowerINTRINSIC_W_CHAIN() local
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| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonBitTracker.cpp | 1253 bool Is64 = DoubleRegsRegClass.contains(PReg); getNextPhysReg() local
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| /llvm-project/llvm/lib/DWP/ |
| H A D | DWP.cpp | 343 bool Is64 = isa<object::ELF64LEObjectFile>(Obj) || in handleCompressedSection() local
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| /llvm-project/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86AsmParser.cpp | 3136 bool Is64 = X86MCRegisterClasses[X86::GR64RegClassID].contains(BaseReg) || ParseMemOperand() local
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| /llvm-project/llvm/lib/Object/ |
| H A D | MachOObjectFile.cpp | 101 bool Is64 = O.is64Bit(); in getSectionPtr() local
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| /llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 3131 bool Is64 = Subtarget.isPPC64(); expandPostRAPseudo() local
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| /llvm-project/llvm/tools/llvm-readobj/ |
| H A D | ELFDumper.cpp | 4534 constexpr bool Is64 = ELFT::Is64Bits; printSectionDetails() local
[all...] |
| /llvm-project/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 11620 bool Is64 = Ops[0]->getType()->getPrimitiveSizeInBits() == 64; EmitAArch64BuiltinExpr() local
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