/freebsd-src/contrib/llvm-project/llvm/lib/Transforms/ObjCARC/ |
H A D | ARCRuntimeEntryPoints.h | 138 Function *getIntrinsicEntryPoint(Function *&Decl, Intrinsic::ID IntID) { in getIntrinsicEntryPoint()
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonOptimizeSZextends.cpp | 56 bool HexagonOptimizeSZextends::intrinsicAlreadySextended(Intrinsic::ID IntID) { in intrinsicAlreadySextended()
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H A D | HexagonISelLowering.cpp | 3845 Intrinsic::ID IntID = (SZ == 32) ? Intrinsic::hexagon_L2_loadw_locked emitLoadLinked() local 3866 Intrinsic::ID IntID = (SZ == 32) ? Intrinsic::hexagon_S2_storew_locked emitStoreConditional() local
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H A D | HexagonVectorCombine.cpp | 2569 Intrinsic::ID IntID, Type *RetTy, in createHvxIntrinsic() argument
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/freebsd-src/contrib/llvm-project/clang/lib/CodeGen/ |
H A D | CGObjC.cpp | 2229 llvm::Intrinsic::ID IntID) { in emitARCCopyOperation() argument 2157 getARCIntrinsic(llvm::Intrinsic::ID IntID,CodeGenModule & CGM) getARCIntrinsic() argument 2169 emitARCValueOperation(CodeGenFunction & CGF,llvm::Value * value,llvm::Type * returnType,llvm::Function * & fn,llvm::Intrinsic::ID IntID,llvm::CallInst::TailCallKind tailKind=llvm::CallInst::TCK_None) emitARCValueOperation() argument 2193 emitARCLoadOperation(CodeGenFunction & CGF,Address addr,llvm::Function * & fn,llvm::Intrinsic::ID IntID) emitARCLoadOperation() argument 2205 emitARCStoreOperation(CodeGenFunction & CGF,Address addr,llvm::Value * value,llvm::Function * & fn,llvm::Intrinsic::ID IntID,bool ignored) emitARCStoreOperation() argument [all...] |
H A D | CGBuiltin.cpp | 8122 packTBLDVectorList(CodeGenFunction & CGF,ArrayRef<Value * > Ops,Value * ExtOp,Value * IndexOp,llvm::Type * ResTy,unsigned IntID,const char * Name) packTBLDVectorList() argument 9552 unsigned IntID; EmitSVEPredicateCast() local 9578 EmitSVEGatherLoad(const SVETypeFlags & TypeFlags,SmallVectorImpl<Value * > & Ops,unsigned IntID) EmitSVEGatherLoad() argument 9632 EmitSVEScatterStore(const SVETypeFlags & TypeFlags,SmallVectorImpl<Value * > & Ops,unsigned IntID) EmitSVEScatterStore() argument 9689 EmitSVEGatherPrefetch(const SVETypeFlags & TypeFlags,SmallVectorImpl<Value * > & Ops,unsigned IntID) EmitSVEGatherPrefetch() argument 9722 EmitSVEStructLoad(const SVETypeFlags & TypeFlags,SmallVectorImpl<Value * > & Ops,unsigned IntID) EmitSVEStructLoad() argument 9770 EmitSVEStructStore(const SVETypeFlags & TypeFlags,SmallVectorImpl<Value * > & Ops,unsigned IntID) EmitSVEStructStore() argument 9959 EmitSMELd1St1(const SVETypeFlags & TypeFlags,SmallVectorImpl<Value * > & Ops,unsigned IntID) EmitSMELd1St1() argument 9989 EmitSMEReadWrite(const SVETypeFlags & TypeFlags,SmallVectorImpl<Value * > & Ops,unsigned IntID) EmitSMEReadWrite() argument 10001 EmitSMEZero(const SVETypeFlags & TypeFlags,SmallVectorImpl<Value * > & Ops,unsigned IntID) EmitSMEZero() argument 10011 EmitSMELdrStr(const SVETypeFlags & TypeFlags,SmallVectorImpl<Value * > & Ops,unsigned IntID) EmitSMELdrStr() argument 20913 __anonaa650d111702(unsigned IntID, bool IsLoad) EmitHexagonBuiltinExpr() argument 20947 __anonaa650d111802(unsigned IntID, llvm::Type *DestTy) EmitHexagonBuiltinExpr() argument [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 4796 SDValue IntID = lowerVECTOR_SHUFFLE() local 8776 SDValue IntID = DAG.getTargetConstant( LowerINTRINSIC_W_CHAIN() local 8827 SDValue IntID = DAG.getTargetConstant(VlsegInts[NF - 2], DL, XLenVT); LowerINTRINSIC_W_CHAIN() local 8924 SDValue IntID = DAG.getTargetConstant( LowerINTRINSIC_VOID() local 8963 SDValue IntID = DAG.getTargetConstant(VssegInts[NF - 2], DL, XLenVT); LowerINTRINSIC_VOID() local 10022 SDValue IntID = DAG.getTargetConstant( lowerFixedLengthVectorLoadToRVV() local 10080 SDValue IntID = DAG.getTargetConstant( lowerFixedLengthVectorStoreToRVV() local 10127 unsigned IntID = lowerMaskedLoad() local 10193 unsigned IntID = lowerMaskedStore() local 11001 SDValue IntID = DAG.getTargetConstant(IsUnmasked ? Intrinsic::riscv_vlse lowerVPStridedLoad() local 11049 SDValue IntID = DAG.getTargetConstant(IsUnmasked ? Intrinsic::riscv_vsse lowerVPStridedStore() local 11142 unsigned IntID = lowerMaskedGather() local 11241 unsigned IntID = lowerMaskedScatter() local 14913 SDValue IntID = performCONCAT_VECTORSCombine() local 15586 SDValue IntID = PerformDAGCombine() local [all...] |
H A D | RISCVISelDAGToDAG.cpp | 109 SDValue IntID = PreprocessISelDAG() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelDAGToDAG.cpp | 5347 auto IntID = N->getConstantOperandVal(0); Select() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 2196 Intrinsic::ID IntID = computeKnownBitsForTargetNode() local 24903 Intrinsic::ID IntID = ReplaceNodeResults() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 20089 Intrinsic::ID IntID = computeKnownBitsForTargetNode() local
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