| /llvm-project/llvm/lib/Target/DirectX/ |
| H A D | DirectXSubtarget.h | 33 DirectXInstrInfo InstrInfo; variable
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| /llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiSubtarget.h | 68 LanaiInstrInfo InstrInfo; variable
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| /llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreSubtarget.h | 33 XCoreInstrInfo InstrInfo; variable
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| /llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaSubtarget.h | 34 XtensaInstrInfo InstrInfo; variable
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| /llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCSubtarget.h | 33 ARCInstrInfo InstrInfo; variable
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| /llvm-project/llvm/lib/Target/VE/ |
| H A D | VESubtarget.h | 42 VEInstrInfo InstrInfo; variable
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| /llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430Subtarget.h | 41 MSP430InstrInfo InstrInfo; variable
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| /llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcSubtarget.h | 47 SparcInstrInfo InstrInfo; variable
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| /llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRSubtarget.h | 107 AVRInstrInfo InstrInfo; variable
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| /llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZSubtarget.h | 44 SystemZInstrInfo InstrInfo; variable
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| /llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXSubtarget.h | 47 NVPTXInstrInfo InstrInfo; global() variable
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| /llvm-project/llvm/tools/llvm-exegesis/lib/ |
| H A D | SchedClassResolution.cpp | 247 const MCInstrInfo &InstrInfo, in ResolveVariantSchedClassId()
260 const MCInstrInfo &InstrInfo, in resolveSchedClassId()
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| H A D | LlvmState.cpp | 105 const MCInstrInfo &InstrInfo = getInstrInfo(); createOpcodeNameToOpcodeIdxMapping() local
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| H A D | Clustering.cpp | 189 const MCSubtargetInfo &SubtargetInfo, const MCInstrInfo &InstrInfo) { in clusterizeNaive()
331 const MCSubtargetInfo *SubtargetInfo, const MCInstrInfo *InstrInfo) { in create()
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| H A D | MCInstrDescView.cpp | 105 create(const MCInstrInfo & InstrInfo,const RegisterAliasingTrackerCache & RATC,const BitVectorCache & BVC,unsigned Opcode) create() argument
301 InstructionsCache(const MCInstrInfo & InstrInfo,const RegisterAliasingTrackerCache & RATC) InstructionsCache() argument
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| H A D | Analysis.cpp | 234 const MCInstrInfo &InstrInfo) { in writeParallelSnippetHtml()
246 const MCInstrInfo &InstrInfo) { in writeLatencySnippetHtml()
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| /llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFSubtarget.h | 38 BPFInstrInfo InstrInfo; variable
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| /llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchSubtarget.h | 47 LoongArchInstrInfo InstrInfo; variable
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| /llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVSubtarget.h | 48 SPIRVInstrInfo InstrInfo; variable
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| /llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblySubtarget.h | 59 WebAssemblyInstrInfo InstrInfo; global() variable
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| /llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kSubtarget.h | 67 M68kInstrInfo InstrInfo; variable
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| /llvm-project/llvm/docs/TableGen/ |
| H A D | BackEnds.rst | 106 InstrInfo section in LLVM BackEnds
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| /llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineUniformityAnalysis.cpp | 50 const auto &InstrInfo = *F.getSubtarget().getInstrInfo(); in initialize() local
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| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIWholeQuadMode.cpp | 127 struct InstrInfo { struct
128 Needs__anon30a077910111::InstrInfo global() argument
129 Disabled__anon30a077910111::InstrInfo global() argument
130 OutNeeds__anon30a077910111::InstrInfo global() argument
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| /llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/ |
| H A D | LanaiMCCodeEmitter.cpp | 306 return new LanaiMCCodeEmitter(InstrInfo, context); in createLanaiMCCodeEmitter() argument
|