| /llvm-project/llvm/tools/llvm-cfi-verify/lib/ |
| H A D | FileAnalysis.h | 77 struct Instr { struct
79 MCInst Instruction; // Instruction. argument
80 uint64_t InstructionSize; // Size of this instruction. argument
81 bool Valid; // Is this a valid instruction? If false, Instr::Instruction is argument
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| H A D | GraphBuilder.h | 42 using Instr = llvm::cfi_verify::FileAnalysis::Instr; variable
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| /llvm-project/llvm/lib/ExecutionEngine/JITLink/ |
| H A D | ELF_aarch64.cpp | 279 uint32_t Instr = *(const ulittle32_t *)FixupContent; in addSingleRelocation() local
198 uint32_t Instr = *(const ulittle32_t *)FixupContent; addSingleRelocation() local
207 uint32_t Instr = *(const ulittle32_t *)FixupContent; addSingleRelocation() local
224 uint32_t Instr = *(const ulittle32_t *)FixupContent; addSingleRelocation() local
235 uint32_t Instr = *(const ulittle32_t *)FixupContent; addSingleRelocation() local
246 uint32_t Instr = *(const ulittle32_t *)FixupContent; addSingleRelocation() local
257 uint32_t Instr = *(const ulittle32_t *)FixupContent; addSingleRelocation() local
268 uint32_t Instr = *(const ulittle32_t *)FixupContent; addSingleRelocation() local
290 uint32_t Instr = *(const ulittle32_t *)FixupContent; addSingleRelocation() local
301 uint32_t Instr = *(const ulittle32_t *)FixupContent; addSingleRelocation() local
312 uint32_t Instr = *(const ulittle32_t *)FixupContent; addSingleRelocation() local
323 uint32_t Instr = *(const ulittle32_t *)FixupContent; addSingleRelocation() local
332 uint32_t Instr = *(const ulittle32_t *)FixupContent; addSingleRelocation() local
[all...] |
| H A D | MachO_arm64.cpp | 353 uint32_t Instr = *(const ulittle32_t *)FixupContent; addRelocations() local
397 uint32_t Instr = *(const ulittle32_t *)FixupContent; addRelocations() local
417 uint32_t Instr = *(const ulittle32_t *)FixupContent; addRelocations() local
431 uint32_t Instr = *(const ulittle32_t *)FixupContent; addRelocations() local
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| /llvm-project/llvm/include/llvm/ExecutionEngine/JITLink/ |
| H A D | aarch64.h | 423 // Returns whether the Instr is LD/ST (imm12) in getMoveWide16Shift() argument
362 isLoadStoreImm12(uint32_t Instr) isLoadStoreImm12() argument
367 isTestAndBranchImm14(uint32_t Instr) isTestAndBranchImm14() argument
372 isCondBranchImm19(uint32_t Instr) isCondBranchImm19() argument
377 isCompAndBranchImm19(uint32_t Instr) isCompAndBranchImm19() argument
382 isADR(uint32_t Instr) isADR() argument
387 isLDRLiteral(uint32_t Instr) isLDRLiteral() argument
398 getPageOffset12Shift(uint32_t Instr) getPageOffset12Shift() argument
414 isMoveWideImm16(uint32_t Instr) isMoveWideImm16() argument
[all...] |
| /llvm-project/llvm/tools/llvm-exegesis/lib/ |
| H A D | SerialSnippetGenerator.cpp | 38 computeAliasingInstructions(const LLVMState &State, const Instruction *Instr, in computeAliasingInstructions() argument
75 if (Instr.hasMemoryOperands()) in getExecutionModes() argument
137 const Instruction &Instr = Variant.getInstr(); appendCodeTemplates() local
[all...] |
| H A D | ParallelSnippetGenerator.cpp | 82 static bool hasVariablesWithTiedOperands(const Instruction &Instr) { in hasVariablesWithTiedOperands() argument
152 const Instruction &Instr = IT.getInstr(); in generateSingleRegisterForInstrAvoidingDefUseOverlap() local
220 const Instruction &Instr = IT.getInstr(); in generateSingleSnippetForInstrAvoidingDefUseOverlap() local
297 const Instruction &Instr = Variant.getInstr(); in generateCodeTemplates() local
[all...] |
| H A D | Target.h | 233 randomizeTargetMCOperand(const Instruction & Instr,const Variable & Var,MCOperand & AssignedValue,const BitVector & ForbiddenRegs) randomizeTargetMCOperand() argument
244 allowAsBackToBack(const Instruction & Instr) allowAsBackToBack() argument
252 generateInstructionVariants(const Instruction & Instr,unsigned MaxConfigsPerOpcode) generateInstructionVariants() argument
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| H A D | CodeTemplate.cpp | 27 InstructionTemplate::InstructionTemplate(const Instruction *Instr) in InstructionTemplate()
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| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMFeatures.h | 24 inline bool isV8EligibleForIT(const InstrType *Instr) { in isV8EligibleForIT()
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| /llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsInstructionSelector.cpp | 737 struct Instr { in select() struct
740 Instr(unsigned Opcode, Register Def, Register LHS, Register RHS) in select() argument
738 OpcodeMipsInstructionSelector::select::Instr select() argument
739 RHSMipsInstructionSelector::select::Instr select() argument
743 hasImmMipsInstructionSelector::select::Instr select() argument
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| /llvm-project/llvm/unittests/tools/llvm-exegesis/X86/ |
| H A D | SnippetGeneratorTest.cpp | 47 const Instruction &Instr = State.getIC().getInstr(Opcode); in checkAndGetCodeTemplates() local
149 const Instruction &Instr = State.getIC().getInstr(Opcode); in TEST_F() local
170 const Instruction &Instr = State.getIC().getInstr(Opcode); in TEST_F() local
240 const Instruction &Instr = State.getIC().getInstr(Opcode); in TEST_F() local
423 const Instruction &Instr = State.getIC().getInstr(Opcode); in TEST_F() local
438 const Instruction &Instr = State.getIC().getInstr(Opcode); TEST_F() local
501 const Instruction &Instr = State.getIC().getInstr(Opcode); TEST_F() local
[all...] |
| /llvm-project/llvm/include/llvm/Analysis/ |
| H A D | VectorUtils.h | 459 InterleaveGroup(InstTy * Instr,int32_t Stride,Align Alignment) InterleaveGroup() argument
478 insertMember(InstTy * Instr,int32_t Index,Align NewAlign) insertMember() argument
530 getIndex(const InstTy * Instr) getIndex() argument
632 isInterleaved(Instruction * Instr) isInterleaved() argument
640 getInterleaveGroup(const Instruction * Instr) getInterleaveGroup() argument
715 createInterleaveGroup(Instruction * Instr,int Stride,Align Alignment) createInterleaveGroup() argument
[all...] |
| /llvm-project/llvm/unittests/tools/llvm-exegesis/Mips/ |
| H A D | SnippetGeneratorTest.cpp | 37 const Instruction &Instr = State.getIC().getInstr(Opcode); in checkAndGetCodeTemplates() local
87 const Instruction &Instr = State.getIC().getInstr(Mips::XOR); in TEST_F() local
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| /llvm-project/llvm/lib/CodeGen/ |
| H A D | RemoveRedundantDebugValues.cpp | 138 for (auto &Instr : DbgValsToBeRemoved) { in reduceDbgValsForwardScan() local
193 for (auto &Instr : DbgValsToBeRemoved) { in reduceDbgValsBackwardScan() local
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| H A D | MachineUniformityAnalysis.cpp | 32 const MachineInstr &Instr) { in markDefsDivergent() argument
79 const MachineInstr &Instr) { in pushUsers() argument
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| H A D | MachineSSAContext.cpp | 87 if (auto *Instr = MRI->getUniqueVRegDef(Value)) { print() local
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| /llvm-project/llvm/tools/llvm-exegesis/lib/X86/ |
| H A D | Target.cpp | 81 static const char *isInvalidMemoryInstr(const Instruction &Instr) { in isInvalidMemoryInstr() argument
216 static const char *isInvalidOpcode(const Instruction &Instr) { in isInvalidOpcode() argument
257 getX86FPFlags(const Instruction & Instr) getX86FPFlags() argument
272 generateLEATemplatesCommon(const Instruction & Instr,const BitVector & ForbiddenRegisters,const LLVMState & State,const SnippetGenerator::Options & Opts,std::function<void (unsigned,unsigned,BitVector & CandidateDestRegs)> RestrictDestRegs) generateLEATemplatesCommon() argument
349 const Instruction &Instr = Variant.getInstr(); generateCodeTemplates() local
409 const Instruction &Instr = Variant.getInstr(); generateCodeTemplates() local
881 randomizeTargetMCOperand(const Instruction & Instr,const Variable & Var,MCOperand & AssignedValue,const BitVector & ForbiddenRegs) const randomizeTargetMCOperand() argument
1299 generateInstructionVariants(const Instruction & Instr,unsigned MaxConfigsPerOpcode) const generateInstructionVariants() argument
[all...] |
| /llvm-project/llvm/lib/Analysis/ |
| H A D | UniformityAnalysis.cpp | 29 return markDivergent(cast<Value>(&Instr)); in markDefsDivergent() argument
59 assert(!isAlwaysUniform(Instr)); in pushUsers() argument
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| /llvm-project/llvm/lib/Target/Lanai/Disassembler/ |
| H A D | LanaiDisassembler.cpp | 90 static void PostOperandDecodeAdjust(MCInst &Instr, uint32_t Insn) { in PostOperandDecodeAdjust()
132 LanaiDisassembler::getInstruction(MCInst &Instr, uint64_t &Size, in getInstruction()
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| /llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXProxyRegErasure.cpp | 107 replaceRegisterUsage(MachineInstr & Instr,MachineOperand & From,MachineOperand & To) replaceRegisterUsage() argument
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| /llvm-project/llvm/unittests/tools/llvm-exegesis/PowerPC/ |
| H A D | SnippetGeneratorTest.cpp | 37 const Instruction &Instr = State.getIC().getInstr(Opcode); in checkAndGetCodeTemplates() local
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| /llvm-project/bolt/lib/Core/ |
| H A D | Exceptions.cpp | 518 uint8_t Opcode = Instr.Opcode; in fillCFIInfoFor() argument
658 for (const CFIProgram::Instruction &Instr : CurFDE.getLinkedCIE()->cfis()) fillCFIInfoFor() local
662 for (const CFIProgram::Instruction &Instr : CurFDE.cfis()) fillCFIInfoFor() local
[all...] |
| /llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | LiveIntervals.h | 222 isNotInMIMap(const MachineInstr & Instr) isNotInMIMap() argument
227 getInstructionIndex(const MachineInstr & Instr) getInstructionIndex() argument
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| H A D | DbgEntityHistoryCalculator.h | 78 Entry(const MachineInstr *Instr, EntryKind Kind) in Entry()
|