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Searched defs:Ins (Results 1 – 25 of 59) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsCCState.cpp87 const SmallVectorImpl<ISD::InputArg> &Ins, in PreAnalyzeCallResultForF128()
112 const SmallVectorImpl<ISD::InputArg> &Ins, const Type *RetTy) { in PreAnalyzeCallResultForVectorFloat()
148 const SmallVectorImpl<ISD::InputArg> &Ins) { in PreAnalyzeFormalArgumentsForF128()
H A DMipsCCState.h110 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments()
119 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeCallResult()
H A DMipsCallLowering.cpp446 SmallVector<ISD::InputArg, 8> Ins; in lowerFormalArguments() local
616 SmallVector<ISD::InputArg, 8> Ins; in lowerCall() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCCCState.cpp27 const SmallVectorImpl<ISD::InputArg> &Ins) { in PreAnalyzeFormalArguments()
H A DPPCCCState.h50 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments()
H A DPPCRegisterInfo.cpp883 MachineBasicBlock::reverse_iterator Ins = MI; in lowerCRBitSpilling() local
1452 MachineBasicBlock::iterator Ins = MBB->begin(); in materializeFrameBaseRegister() local
H A DPPCISelLowering.cpp3927 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments()
3942 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments_32SVR4()
4208 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments_64SVR4()
4775 const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG &DAG) const { in IsEligibleForTailCallOptimization_64SVR4() argument
4863 const SmallVectorImpl<ISD::InputArg> &Ins, in IsEligibleForTailCallOptimization()
5078 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCallResult()
5493 unsigned NumBytes, const SmallVectorImpl<ISD::InputArg> &Ins, in FinishCall()
5566 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
5640 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCall_32SVR4()
5894 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCall_64SVR4()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DCallingConvLower.cpp90 CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments()
167 void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeCallResult()
269 const SmallVectorImpl<ISD::InputArg> &Ins, in resultsCompatible()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp446 const SmallVectorImpl<ISD::InputArg> &Ins) { in AnalyzeVarArgs()
550 const SmallVectorImpl<ISD::InputArg> &Ins) { in AnalyzeRetResult()
568 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments()
591 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
619 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCCCArguments()
807 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCCCCallTo()
935 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCallResult()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp301 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerFormalArguments()
373 auto &Ins = CLI.Ins; in LowerCall() local
549 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerCallResult()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp228 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
432 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments()
447 const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, in LowerCallArguments()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp398 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerFormalArguments()
415 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
439 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerCCCArguments()
600 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerCCCCallTo()
776 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerCallResult()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZCallingConv.h51 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/TableGen/
H A DTGParser.h114 bool Ins = vars.insert(std::make_pair(std::string(Name), I)).second; in addVar() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp195 argsAreStructReturn(const SmallVectorImpl<ISD::InputArg> &Ins) { in argsAreStructReturn()
378 const SmallVectorImpl<ISD::InputArg> &Ins, in LowerMemArgument()
473 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
834 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerCallResult()
869 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, in LowerFormalArguments()
1166 const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG &DAG) const { in IsEligibleForTailCallOptimization() argument
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Transforms/Utils/
H A DSSAUpdaterImpl.h86 SmallVectorImpl<PhiT *> *Ins) : in SSAUpdaterImpl()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp1036 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
1110 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCCCCallTo()
1242 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments()
1261 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCCCArguments()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DFastISel.h96 SmallVector<ISD::InputArg, 4> Ins; member
H A DCallingConvLower.h287 void AnalyzeArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeArguments()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp1126 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments()
1229 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
1394 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, SelectionDAG &DAG, in LowerCallResult()
/netbsd-src/external/apache2/llvm/dist/clang/tools/clang-import-test/
H A Dclang-import-test.cpp164 auto Ins = std::make_unique<CompilerInstance>(); in BuildCompilerInstance() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonCommonGEP.cpp563 std::pair<NodeSymRel::iterator, bool> Ins = EqRel.insert(C); in common() local
594 std::pair<ProjMap::iterator,bool> Ins = PM.insert(std::make_pair(&S, Min)); in common() local
1251 ValueVect Ins; in removeDeadCode() local
H A DHexagonISelLowering.cpp348 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCallResult()
406 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall() local
778 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments()
2626 SDValue Ins = DAG.getNode(HexagonISD::INSERT, dl, MVT::i32, in insertVector() local
3433 const SmallVectorImpl<ISD::InputArg> &Ins, in IsEligibleForTailCallOptimization()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64RegisterInfo.cpp549 MachineBasicBlock::iterator Ins = MBB->begin(); in materializeFrameBaseRegister() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/
H A DStraightLineStrengthReduce.cpp172 Instruction *Ins = nullptr; member

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