/llvm-project/llvm/lib/Target/ARC/ |
H A D | ARCISelLowering.cpp | 411 SmallVectorImpl<SDValue> &InVals) { in lowerCallResult() argument [all...] |
/llvm-project/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 973 SmallVectorImpl<SDValue> &InVals) { in LowerCallResult() argument [all...] |
/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 3532 LowerCallResult(SDValue Chain,SDValue InGlue,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals,TargetLowering::CallLoweringInfo & CLI) const LowerCallResult() argument 4377 copyByValRegs(SDValue Chain,const SDLoc & DL,std::vector<SDValue> & OutChains,SelectionDAG & DAG,const ISD::ArgFlagsTy & Flags,SmallVectorImpl<SDValue> & InVals,const Argument * FuncArg,unsigned FirstReg,unsigned LastReg,const CCValAssign & VA,MipsCCState & State) const copyByValRegs() argument [all...] |
/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLoweringCall.cpp | 1096 LowerCallResult(SDValue Chain,SDValue InGlue,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals,uint32_t * RegMask) const LowerCallResult() argument
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/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 5797 FinishCall(CallFlags CFlags,const SDLoc & dl,SelectionDAG & DAG,SmallVector<std::pair<unsigned,SDValue>,8> & RegsToPass,SDValue Glue,SDValue Chain,SDValue CallSeqStart,SDValue & Callee,int SPDiff,unsigned NumBytes,const SmallVectorImpl<ISD::InputArg> & Ins,SmallVectorImpl<SDValue> & InVals,const CallBase * CB) const FinishCall() argument 5984 LowerCall_32SVR4(SDValue Chain,SDValue Callee,CallFlags CFlags,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals,const CallBase * CB) const LowerCall_32SVR4() argument 6238 LowerCall_64SVR4(SDValue Chain,SDValue Callee,CallFlags CFlags,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals,const CallBase * CB) const LowerCall_64SVR4() argument 7500 LowerCall_AIX(SDValue Chain,SDValue Callee,CallFlags CFlags,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals,const CallBase * CB) const LowerCall_AIX() argument [all...] |
/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 352 LowerCallResult(SDValue Chain,SDValue Glue,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals,const SmallVectorImpl<SDValue> & OutVals,SDValue Callee) const LowerCallResult() argument
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/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGBuilder.cpp | 11025 SmallVector<SDValue, 4> InVals; LowerCallTo() local 11556 SmallVector<SDValue, 8> InVals; LowerArguments() local [all...] |
/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelLowering.cpp | 1332 lowerUnhandledCall(CallLoweringInfo & CLI,SmallVectorImpl<SDValue> & InVals,StringRef Reason) const lowerUnhandledCall() argument
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H A D | SIISelLowering.cpp | 3242 LowerCallResult(SDValue Chain,SDValue InGlue,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals,bool IsThisReturn,SDValue ThisVal) const LowerCallResult() argument [all...] |
/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | TargetLowering.h | 4539 SmallVector<SDValue, 4> InVals; global() member
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/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 2220 LowerCallResult(SDValue Chain,SDValue InGlue,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals,bool isThisReturn,SDValue ThisVal,bool isCmseNSCall) const LowerCallResult() argument
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/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 7711 LowerCallResult(SDValue Chain,SDValue InGlue,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<CCValAssign> & RVLocs,const SDLoc & DL,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals,bool isThisReturn,SDValue ThisVal,bool RequiresSMChange) const LowerCallResult() argument [all...] |