| /freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCTLSDynamicCall.cpp | 85 Register InReg = PPC::NoRegister; processBlock() local
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| /freebsd-src/contrib/llvm-project/clang/lib/CodeGen/Targets/ |
| H A D | Lanai.cpp | 126 bool InReg = shouldUseInReg(Ty, State); in classifyArgumentType() local
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| H A D | Sparc.cpp | 133 bool InReg; member
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| H A D | X86.cpp | 675 shouldAggregateUseDirect(QualType Ty,CCState & State,bool & InReg,bool & NeedsPadding) const shouldAggregateUseDirect() argument
811 bool InReg; classifyArgumentType() local
886 bool InReg = shouldPrimitiveUseInReg(Ty, State); classifyArgumentType() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64Arm64ECCallLowering.cpp | 368 auto InReg = Attrs.getParamAttr(0, Attribute::InReg); buildExitThunk() local
[all...] |
| /freebsd-src/contrib/llvm-project/clang/include/clang/CodeGen/ |
| H A D | CGFunctionInfo.h | 116 bool InReg : 1; // isDirect() || isExtend() || isIndirect() variable
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| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | StatepointLowering.cpp | 1238 Register InReg = Record.payload.Reg; visitGCRelocate() local
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| H A D | SelectionDAGBuilder.cpp | 1703 Register InReg = It->second; getCopyFromRegs() local
1906 Register InReg = FuncInfo.InitializeRegForValue(Inst); getValueImpl() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInsertVSETVLI.cpp | 1257 Register InReg = PHI->getOperand(PHIOp).getReg(); needVSETVLIPHI() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 633 const bool InReg = Arg.hasAttribute(Attribute::InReg); in lowerFormalArguments() local
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| H A D | AMDGPUMachineCFGStructurizer.cpp | 2682 unsigned InReg = LRegion->getBBSelectRegIn(); structurizeComplexRegion() local
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| H A D | AMDGPUInstructionSelector.cpp | 2394 bool InReg = I.getOpcode() == AMDGPU::G_SEXT_INREG; selectG_SZA_EXT() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 456 Register InReg = MI.getOperand(1).getReg(); LowerFPToInt() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 834 bool InReg = VA.isRegLoc() && LowerFormalArguments() local
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