| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSplitConst32AndConst64.cpp | 78 uint64_t ImmValue = MI.getOperand(1).getImm(); in runOnMachineFunction() local
85 int64_t ImmValue = MI.getOperand(1).getImm(); in runOnMachineFunction() local
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| H A D | HexagonHardwareLoops.cpp | 659 int64_t Mask = 0, ImmValue = 0; getLoopTripCount() local
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| /llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelDAGToDAG.cpp | 400 if (IsSigned && ImmValue.isSignedIntN(ImmBitSize)) { in selectVSplatUimmPow2() local
354 APInt ImmValue; selectVSplatImm() local
379 APInt ImmValue; selectVSplatUimmInvPow2() local
[all...] |
| /llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelDAGToDAG.cpp | 553 APInt ImmValue; selectVSplatCommon() local
629 APInt ImmValue; selectVSplatUimmPow2() local
660 APInt ImmValue; selectVSplatMaskL() local
693 APInt ImmValue; selectVSplatMaskR() local
714 APInt ImmValue; selectVSplatUimmInvPow2() local
[all...] |
| H A D | MicroMipsSizeReduction.cpp | 528 int64_t ImmValue; in ReduceADDIUToADDIUSP() local
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| /llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 2620 int64_t ImmValue = Inst.getOperand(2).getImm(); tryExpandInstruction() local
2632 int64_t ImmValue = Inst.getOperand(2).getImm(); tryExpandInstruction() local
2759 loadImmediate(int64_t ImmValue,unsigned DstReg,unsigned SrcReg,bool Is32BitImm,bool IsAddress,SMLoc IDLoc,MCStreamer & Out,const MCSubtargetInfo * STI) loadImmediate() argument
3717 int64_t ImmValue = ImmOp.getImm(); expandBranchImm() local
4248 int64_t ImmValue; expandDivRem() local
4645 int64_t ImmValue = Inst.getOperand(2).getImm(); expandSgeImm() local
4702 int64_t ImmValue = Inst.getOperand(2).getImm(); expandSgtImm() local
4782 int64_t ImmValue = Inst.getOperand(2).getImm(); expandSleImm() local
4833 int64_t ImmValue = Inst.getOperand(2).getImm(); expandAliasImmediate() local
4995 int64_t ImmValue = Inst.getOperand(2).getImm(); expandRotationImm() local
5120 int64_t ImmValue = Inst.getOperand(2).getImm() % 64; expandDRotationImm() local
5230 int32_t ImmValue = Inst.getOperand(2).getImm(); expandMulImm() local
5546 int64_t ImmValue = Inst.getOperand(2).getImm(); expandSneI() local
5811 int64_t ImmValue = BaseOp.getImm(); expandSaaAddr() local
[all...] |
| /llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.cpp | 207 unsigned SrcReg2, int64_t ImmValue, in isRedundantFlagInstr() argument
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| /llvm-project/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 623 int32_t ImmValue = RawImmValue; expandSET() local
688 int64_t ImmValue = IsImm ? MCValOp.getImm() : 0; expandSETX() local
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| /llvm-project/bolt/lib/Core/ |
| H A D | MCPlusBuilder.cpp | 351 const int64_t ImmValue = Inst.getOperand(I).getImm(); in removeAnnotation() local
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| /llvm-project/llvm/lib/Target/AArch64/Utils/ |
| H A D | AArch64BaseInfo.h | 364 uint16_t ImmValue; global() member
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| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 2594 int32_t ImmValue = N->getConstantOperandVal(3); SelectMVE_WB() local
2629 int32_t ImmValue = N->getConstantOperandVal(3); SelectMVE_LongShift() local
2692 int32_t ImmValue = N->getConstantOperandVal(3); SelectMVE_VSHLC() local
2879 int ImmValue = ImmOp->getAsZExtVal(); SelectMVE_VxDUP() local
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| H A D | ARMBaseInstrInfo.cpp | 2861 isRedundantFlagInstr(const MachineInstr * CmpI,Register SrcReg,Register SrcReg2,int64_t ImmValue,const MachineInstr * OI,bool & IsThumb1) isRedundantFlagInstr() argument
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| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 2028 uint64_t ImmValue = 0; FoldOperand() local
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| /llvm-project/llvm/lib/Object/ |
| H A D | MachOObjectFile.cpp | 3518 uint8_t ImmValue = Byte & MachO::REBASE_IMMEDIATE_MASK; moveNext() local
3857 uint8_t ImmValue = Byte & MachO::BIND_IMMEDIATE_MASK; moveNext() local
[all...] |
| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 4843 isRedundantFlagInstr(const MachineInstr & FlagI,Register SrcReg,Register SrcReg2,int64_t ImmMask,int64_t ImmValue,const MachineInstr & OI,bool * IsSwapped,int64_t * ImmDelta) const isRedundantFlagInstr() argument
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| /llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 10721 int64_t ImmValue = cast<ConstantSDNode>(Op.getOperand(2))->getSExtValue(); lowerVECTOR_SPLICE() local
11578 int64_t ImmValue = cast<ConstantSDNode>(Offset)->getSExtValue(); lowerVPSpliceExperimental() local
|