| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonOptAddrMode.cpp | 413 const MachineOperand ImmOp = AddMI->getOperand(2); in updateAddUses() local
483 bool HexagonOptAddrMode::changeLoad(MachineInstr *OldMI, MachineOperand ImmOp, in changeLoad()
544 bool HexagonOptAddrMode::changeStore(MachineInstr *OldMI, MachineOperand ImmOp, in changeStore()
606 const MachineOperand &ImmOp, in changeAddAsl()
672 const MachineOperand ImmOp = TfrMI->getOperand(1); in xformUseMI() local
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| H A D | HexagonAsmPrinter.cpp | 255 MCOperand &ImmOp = Inst.getOperand(i); in ScaleVectorOffset() local
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| H A D | HexagonConstExtenders.cpp | 1778 const MachineOperand &ImmOp = MI.getOperand(IsAddi ? 2 : 1); in replaceInstrExpr() local
1895 MachineOperand &ImmOp = P.first->getOperand(J+1); in replaceInstr() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86CallFrameOptimization.cpp | 291 const MachineOperand &ImmOp = MI->getOperand(X86::AddrNumOperands); in classifyInstruction() local
297 const MachineOperand &ImmOp = MI->getOperand(X86::AddrNumOperands); in classifyInstruction() local
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| H A D | X86MCInstLower.cpp | 320 unsigned ImmOp = Inst.getNumOperands() - 1; in SimplifyShortImmForm() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | MachineDebugify.cpp | 131 auto ImmOp = MachineOperand::CreateImm(NextImm++); in applyDebugifyMetadataToMachineFunction() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/AsmParser/ |
| H A D | BPFAsmParser.cpp | 93 struct ImmOp { struct
94 const MCExpr *Val;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVMergeBaseOffset.cpp | 246 MachineOperand &ImmOp = LoADDI.getOperand(2); in detectAndFoldOffset() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 857 unsigned ImmOp; in getAddSubImmediate() local
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| H A D | Thumb2InstrInfo.cpp | 699 MachineOperand &ImmOp = MI.getOperand(FrameRegIdx+1); in rewriteT2FrameIndex() local
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| H A D | ThumbRegisterInfo.cpp | 393 MachineOperand &ImmOp = MI.getOperand(ImmIdx); in rewriteFrameIndex() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
| H A D | BPFMISimplifyPatchable.cpp | 123 const MachineOperand &ImmOp = DefInst->getOperand(2); in checkADDrr() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86Operand.h | 52 struct ImmOp { struct
53 const MCExpr *Val;
54 bool LocalRef;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/CSKY/AsmParser/ |
| H A D | CSKYAsmParser.cpp | 94 struct ImmOp { struct
95 const MCExpr *Val;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 242 struct ImmOp { struct in __anon6f8db8bd0211::SparcOperand
243 const MCExpr *Val;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| H A D | AVRISelDAGToDAG.cpp | 241 SDValue ImmOp = Op->getOperand(1); in SelectInlineAsmMemoryOperand() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/AsmParser/ |
| H A D | LanaiAsmParser.cpp | 126 struct ImmOp { struct
127 const MCExpr *Value;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIFoldOperands.cpp | 930 MachineOperand ImmOp = MachineOperand::CreateImm(Imm.getSExtValue()); in foldOperand() local
1432 const MachineOperand *ImmOp = nullptr; in isOMod() local
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| H A D | SIFixSGPRCopies.cpp | 310 const MachineOperand *ImmOp = in isSafeToFoldImmIntoCopy() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/AsmParser/ |
| H A D | VEAsmParser.cpp | 176 struct ImmOp { struct in __anonf0f8b3610211::VEOperand
177 const MCExpr *Val;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/AsmParser/ |
| H A D | PPCAsmParser.cpp | 184 struct ImmOp { struct
185 int64_t Val;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 175 struct ImmOp { struct in __anon649c30870111::AMDGPUOperand
176 int64_t Val;
177 ImmTy Type;
178 bool IsFPImm;
179 mutable ImmKindTy Kind;
180 Modifiers Mods;
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/AsmParser/ |
| H A D | RISCVAsmParser.cpp | 273 struct ImmOp { struct
274 const MCExpr *Val;
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.h | 619 MachineInstrBuilder buildSExtInReg(const DstOp &Res, const SrcOp &Op, int64_t ImmOp) { in buildSExtInReg()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 864 struct ImmOp { struct in __anon5ed6d99d0211::MipsOperand
865 const MCExpr *Val;
2864 const MCOperand &ImmOp = Inst.getOperand(1); in expandLoadImm() local
3617 const MCOperand &ImmOp = Inst.getOperand(1); in expandBranchImm() local
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