| /llvm-project/bolt/lib/Target/X86/ |
| H A D | X86MCSymbolizer.cpp | 27 bool IsBranch, uint64_t ImmOffset, uint64_t ImmSize, uint64_t InstSize) { in tryAddingSymbolicOperand()
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| /llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCCodeEmitter.cpp | 415 isDispOrCDisp8(uint64_t TSFlags,int Value,int & ImmOffset) isDispOrCDisp8() argument
802 int ImmOffset = 0; emitMemModRMByte() local
829 int ImmOffset = 0; emitMemModRMByte() local
[all...] |
| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterBankInfo.cpp | 1273 return SOffset + ImmOffset; in setBufferOffsets() local
1255 uint32_t SOffset, ImmOffset; setBufferOffsets() local
1365 int64_t ImmOffset = 0; applyMappingSBufferLoad() local
1801 unsigned ImmOffset; splitBufferOffsets() local
[all...] |
| H A D | AMDGPUISelDAGToDAG.cpp | 1767 int64_t ImmOffset = 0; SelectGlobalSAddr() local
1941 int64_t ImmOffset = 0; SelectScratchSVAddr() local
2620 int ImmOffset = 0; SelectDS_GWS() local
[all...] |
| H A D | AMDGPUInstructionSelector.cpp | 1666 unsigned ImmOffset; selectDSGWSIntrinsic() local
4375 int64_t ImmOffset = 0; selectGlobalSAddr() local
4486 int64_t ImmOffset = 0; selectScratchSAddr() local
4563 int64_t ImmOffset = 0; selectScratchSVAddr() local
[all...] |
| H A D | AMDGPULegalizerInfo.cpp | 5672 unsigned ImmOffset; splitBufferOffsets() local
5822 unsigned ImmOffset; legalizeBufferStore() local
5893 buildBufferLoad(unsigned Opc,Register LoadDstReg,Register RSrc,Register VIndex,Register VOffset,Register SOffset,unsigned ImmOffset,unsigned Format,unsigned AuxiliaryData,MachineMemOperand * MMO,bool IsTyped,bool HasVIndex,MachineIRBuilder & B) buildBufferLoad() argument
5959 unsigned ImmOffset; legalizeBufferLoad() local
6190 unsigned ImmOffset; legalizeBufferAtomic() local
[all...] |
| H A D | SIISelLowering.cpp | 9973 unsigned ImmOffset = C1->getZExtValue(); splitBufferOffsets() local
10016 uint32_t SOffset, ImmOffset; setBufferOffsets() local
10027 uint32_t SOffset, ImmOffset; setBufferOffsets() local
[all...] |
| H A D | SIInstrInfo.cpp | 9041 splitMUBUFOffset(uint32_t Imm,uint32_t & SOffset,uint32_t & ImmOffset,Align Alignment) const splitMUBUFOffset() argument
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| /llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCFrameLowering.cpp | 860 assert((ImmOffset <= -8 && ImmOffset >= -512) && in emitPrologue() local
1868 const int64_t ImmOffset = MFI.getObjectOffset(SaveIndex); emitEpilogue() local
[all...] |
| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ExpandPseudoInsts.cpp | 776 int ImmOffset = MI.getOperand(2).getImm() + Offset; expandSVESpillFill() local
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| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 4050 SDValue Base, RegOffset, ImmOffset; Select() local
4079 SDValue Base, RegOffset, ImmOffset; Select() local
|