| /openbsd-src/gnu/llvm/llvm/include/llvm/Support/ |
| H A D | MSP430Attributes.h | 36 enum ISA { ISAMSP430 = 1, ISAMSP430X = 2 }; enum
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| /openbsd-src/gnu/llvm/llvm/lib/Analysis/ |
| H A D | VFABIDemangling.cpp | 25 ParseRet tryParseISA(StringRef &MangledName, VFISAKind &ISA) { in tryParseISA()
331 VFISAKind ISA; in tryDemangleForVFABI() local
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Mips/ |
| H A D | MipsSubtarget.cpp | 148 StringRef ISA = hasMips64r6() ? "MIPS64r6" : "MIPS32r6"; in MipsSubtarget() local
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| /openbsd-src/gnu/usr.bin/binutils/opcodes/ |
| H A D | avr-dis.c | 36 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \ argument
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| H A D | i370-opc.c | 453 #define ISA I370_OPCODE_ESA390_SA macro
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| /openbsd-src/gnu/usr.bin/binutils-2.17/opcodes/ |
| H A D | avr-dis.c | 37 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \ argument
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| H A D | i370-opc.c | 441 #define ISA I370_OPCODE_ESA390_SA macro
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| /openbsd-src/gnu/llvm/clang/lib/CodeGen/ |
| H A D | CGDeclCXX.cpp | 495 InitSegAttr *ISA) { in EmitPointerToInitFunc()
542 auto *ISA = D->getAttr<InitSegAttr>(); in EmitCXXGlobalVarDeclInitFunc() local
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| H A D | CGOpenMPRuntime.cpp | 11096 char ISA; in emitX86DeclareSimdFunction() member
11251 char ISA, StringRef ParSeq, in addAArch64VectorName()
11266 StringRef Prefix, char ISA, in addAArch64AdvSIMDNDSNames()
11304 char ISA, unsigned VecRegSize, llvm::Function *Fn, SourceLocation SLoc) { in emitAArch64DeclareSimdFunction()
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| H A D | CGBuiltin.cpp | 1661 llvm::Triple::ArchType ISA = getTarget().getTriple().getArch(); in EmitMSVCBuiltinExpr() local
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| /openbsd-src/gnu/usr.bin/binutils/gas/config/ |
| H A D | tc-mips.c | 251 #define ISA_HAS_64BIT_REGS(ISA) ( \ argument
260 #define ISA_HAS_64BIT_FPRS(ISA) ( \ argument
270 #define ISA_HAS_DROR(ISA) ( \ argument
276 #define ISA_HAS_ROR(ISA) ( \ argument
282 #define ISA_HAS_ODD_SINGLE_FPR(ISA) ( \ argument
290 #define ISA_HAS_MXHC1(ISA) ( \ argument
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| H A D | tc-avr.c | 37 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \ argument
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| /openbsd-src/gnu/llvm/llvm/lib/TargetParser/ |
| H A D | Triple.cpp | 385 ARM::ISAKind ISA = ARM::parseArchISA(ArchName); in parseARMArch() local
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| /openbsd-src/gnu/llvm/llvm/include/llvm/Analysis/ |
| H A D | VectorUtils.h | 127 VFISAKind ISA; /// Instruction Set Architecture. member
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| /openbsd-src/gnu/usr.bin/binutils-2.17/gas/config/ |
| H A D | tc-avr.c | 39 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \ argument
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| H A D | tc-mips.c | 302 #define ISA_HAS_64BIT_REGS(ISA) ( \ argument
311 #define ISA_HAS_64BIT_FPRS(ISA) \ argument
321 #define ISA_HAS_DROR(ISA) ( \ argument
327 #define ISA_HAS_ROR(ISA) ( \ argument
333 #define ISA_HAS_ODD_SINGLE_FPR(ISA) \ argument
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 1374 AMDGPU::IsaVersion ISA = AMDGPU::getIsaVersion(getSTI().getCPU()); in AMDGPUAsmParser() local
5337 AMDGPU::IsaVersion ISA = AMDGPU::getIsaVersion(getSTI().getCPU()); in ParseDirectiveHSACodeObjectISA() local
6518 const AMDGPU::IsaVersion ISA, in encodeCnt()
6552 AMDGPU::IsaVersion ISA = AMDGPU::getIsaVersion(getSTI().getCPU()); in parseCnt() local
6588 AMDGPU::IsaVersion ISA = AMDGPU::getIsaVersion(getSTI().getCPU()); in parseSWaitCntOps() local
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | AMDGPUInstPrinter.cpp | 1502 AMDGPU::IsaVersion ISA = AMDGPU::getIsaVersion(STI.getCPU()); in printWaitFlag() local
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 1993 std::string ISA = hasMips64r6() ? "MIPS64r6" : "MIPS32r6"; in processInstruction() local
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