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Searched defs:ISA (Results 1 – 25 of 28) sorted by relevance

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/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/csky/
H A Dcsky_opts.h30 #define CSKY_CORE(NAME, INTERNAL_IDENT, IDENT, ARCH, ISA) \ argument
43 #define CSKY_ARCH(NAME, CORE_IDENT, ARCH, ISA) \ argument
55 #define CSKY_FPU(NAME, CNAME, ISA) TARGET_FPU_##CNAME, argument
H A Dcsky.c214 #define CSKY_CORE(NAME, CORE, X, ARCH, ISA) \ argument
226 #define CSKY_ARCH(NAME, CORE, ARCH, ISA) \ argument
244 #define CSKY_FPU(NAME, CNAME, ISA) \ argument
/netbsd-src/external/gpl3/gcc/dist/gcc/config/csky/
H A Dcsky_opts.h30 #define CSKY_CORE(NAME, INTERNAL_IDENT, IDENT, ARCH, ISA) \ argument
43 #define CSKY_ARCH(NAME, CORE_IDENT, ARCH, ISA) \ argument
55 #define CSKY_FPU(NAME, CNAME, ISA) TARGET_FPU_##CNAME, argument
H A Dcsky.cc277 #define CSKY_CORE(NAME, CORE, X, ARCH, ISA) \ argument
289 #define CSKY_ARCH(NAME, CORE, ARCH, ISA) \ argument
307 #define CSKY_FPU(NAME, CNAME, ISA) \ argument
/netbsd-src/external/gpl3/gcc/dist/gcc/config/m68k/
H A Dm68k-opts.h26 #define M68K_MICROARCH(NAME,DEVICE,MICROARCH,ISA,FLAGS) \ argument
37 #define M68K_DEVICE(NAME,ENUM_VALUE,FAMILY,MULTILIB,MICROARCH,ISA,FLAGS) \ argument
H A Dm68k.cc435 #define M68K_DEVICE(NAME,ENUM_VALUE,FAMILY,MULTILIB,MICROARCH,ISA,FLAGS) \ argument
446 #define M68K_ISA(NAME,DEVICE,MICROARCH,ISA,FLAGS) \ argument
457 #define M68K_MICROARCH(NAME,DEVICE,MICROARCH,ISA,FLAGS) \ argument
/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/m68k/
H A Dm68k-opts.h26 #define M68K_MICROARCH(NAME,DEVICE,MICROARCH,ISA,FLAGS) \ argument
37 #define M68K_DEVICE(NAME,ENUM_VALUE,FAMILY,MULTILIB,MICROARCH,ISA,FLAGS) \ argument
H A Dm68k.c435 #define M68K_DEVICE(NAME,ENUM_VALUE,FAMILY,MULTILIB,MICROARCH,ISA,FLAGS) \ argument
446 #define M68K_ISA(NAME,DEVICE,MICROARCH,ISA,FLAGS) \ argument
457 #define M68K_MICROARCH(NAME,DEVICE,MICROARCH,ISA,FLAGS) \ argument
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Analysis/
H A DVFABIDemangling.cpp27 ParseRet tryParseISA(StringRef &MangledName, VFISAKind &ISA) { in tryParseISA()
333 VFISAKind ISA; in tryDemangleForVFABI() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsSubtarget.cpp143 StringRef ISA = hasMips64r6() ? "MIPS64r6" : "MIPS32r6"; in MipsSubtarget() local
/netbsd-src/external/apache2/llvm/dist/clang/lib/CodeGen/
H A DCGDeclCXX.cpp439 InitSegAttr *ISA) { in EmitPointerToInitFunc()
486 auto *ISA = D->getAttr<InitSegAttr>(); in EmitCXXGlobalVarDeclInitFunc() local
H A DCGOpenMPRuntime.cpp11308 char ISA; in emitX86DeclareSimdFunction() member
11520 char ISA, StringRef ParSeq, in addAArch64VectorName()
11535 StringRef Prefix, char ISA, in addAArch64AdvSIMDNDSNames()
11573 char ISA, unsigned VecRegSize, llvm::Function *Fn, SourceLocation SLoc) { in emitAArch64DeclareSimdFunction()
/netbsd-src/external/gpl3/binutils/dist/opcodes/
H A Davr-dis.c40 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \ argument
H A Daarch64-tbl.h2919 #define MOPS_SET_OP1_OP2_PME_INSN(NAME, OPCODE, MASK, FLAGS, CONSTRAINTS, ISA) \ argument
2926 #define MOPS_SET_OP1_OP2_INSN(NAME, SUFFIX, OPCODE, MASK, ISA) \ argument
2934 #define MOPS_SET_INSN(NAME, OPCODE, MASK, ISA) \ argument
/netbsd-src/external/gpl3/binutils.old/dist/opcodes/
H A Davr-dis.c40 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \ argument
H A Daarch64-tbl.h2717 #define MOPS_SET_OP1_OP2_PME_INSN(NAME, OPCODE, MASK, FLAGS, CONSTRAINTS, ISA) \ argument
2724 #define MOPS_SET_OP1_OP2_INSN(NAME, SUFFIX, OPCODE, MASK, ISA) \ argument
2732 #define MOPS_SET_INSN(NAME, OPCODE, MASK, ISA) \ argument
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Support/
H A DTriple.cpp339 ARM::ISAKind ISA = ARM::parseArchISA(ArchName); in parseARMArch() local
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Analysis/
H A DVectorUtils.h129 VFISAKind ISA; /// Instruction Set Architecture. member
/netbsd-src/external/gpl3/binutils.old/dist/gas/config/
H A Dtc-mips.c372 #define ISA_IS_R6(ISA) \ argument
377 #define ISA_HAS_64BIT_REGS(ISA) \ argument
388 #define ISA_HAS_64BIT_FPRS(ISA) \ argument
404 #define ISA_HAS_DROR(ISA) \ argument
415 #define ISA_HAS_ROR(ISA) \ argument
429 #define ISA_HAS_ODD_SINGLE_FPR(ISA, CPU)\ argument
447 #define ISA_HAS_MXHC1(ISA) \ argument
458 #define ISA_HAS_LEGACY_NAN(ISA) \ argument
H A Dtc-avr.c48 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \ argument
/netbsd-src/external/gpl3/binutils/dist/gas/config/
H A Dtc-mips.c372 #define ISA_IS_R6(ISA) \ argument
377 #define ISA_HAS_64BIT_REGS(ISA) \ argument
388 #define ISA_HAS_64BIT_FPRS(ISA) \ argument
404 #define ISA_HAS_DROR(ISA) \ argument
415 #define ISA_HAS_ROR(ISA) \ argument
429 #define ISA_HAS_ODD_SINGLE_FPR(ISA, CPU)\ argument
448 #define ISA_HAS_MXHC1(ISA) \ argument
459 #define ISA_HAS_LEGACY_NAN(ISA) \ argument
H A Dtc-avr.c48 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \ argument
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp1293 AMDGPU::IsaVersion ISA = AMDGPU::getIsaVersion(getSTI().getCPU()); in AMDGPUAsmParser() local
4832 AMDGPU::IsaVersion ISA = AMDGPU::getIsaVersion(getSTI().getCPU()); in ParseDirectiveHSACodeObjectISA() local
5952 const AMDGPU::IsaVersion ISA, in encodeCnt()
5986 AMDGPU::IsaVersion ISA = AMDGPU::getIsaVersion(getSTI().getCPU()); in parseCnt() local
6022 AMDGPU::IsaVersion ISA = AMDGPU::getIsaVersion(getSTI().getCPU()); in parseSWaitCntOps() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUInstPrinter.cpp1392 AMDGPU::IsaVersion ISA = AMDGPU::getIsaVersion(STI.getCPU()); in printWaitFlag() local
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp1997 std::string ISA = hasMips64r6() ? "MIPS64r6" : "MIPS32r6"; in processInstruction() local

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