| /netbsd-src/external/apache2/llvm/dist/llvm/lib/MCA/HardwareUnits/ |
| H A D | Scheduler.cpp | 40 Scheduler::Status Scheduler::isAvailable(const InstRef &IR) { in isAvailable()
71 InstRef &IR, in issueInstructionImpl()
100 InstRef &IR, in issueInstruction()
124 InstRef &IR = *I; in promoteToReadySet() local
160 InstRef &IR = *I; in promoteToPendingSet() local
195 InstRef &IR = ReadySet[I]; in select() local
212 InstRef IR = ReadySet[QueueIndex]; in select() local
221 InstRef &IR = *I; in updateIssuedSet() local
251 for (const InstRef &IR : make_range(PendingSet.begin(), EndIt)) { in analyzeDataDependencies() local
300 bool Scheduler::dispatch(InstRef &IR) { in dispatch()
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| H A D | LSUnit.cpp | 69 unsigned LSUnit::dispatch(const InstRef &IR) { in dispatch()
204 void LSUnitBase::onInstructionExecuted(const InstRef &IR) { in onInstructionExecuted()
213 void LSUnitBase::onInstructionRetired(const InstRef &IR) { in onInstructionRetired()
232 void LSUnit::onInstructionExecuted(const InstRef &IR) { in onInstructionExecuted()
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| H A D | RetireControlUnit.cpp | 43 unsigned RetireControlUnit::dispatch(const InstRef &IR) { in dispatch()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/MCA/Stages/ |
| H A D | ExecuteStage.cpp | 53 Error ExecuteStage::issueInstruction(InstRef &IR) { in issueInstruction()
81 InstRef IR = HWS.select(); in issueReadyInstructions() local
113 for (const InstRef &IR : Pending) in cycleStart() local
116 for (const InstRef &IR : Ready) in cycleStart() local
161 static void verifyInstructionEliminated(const InstRef &IR) { in verifyInstructionEliminated()
173 Error ExecuteStage::handleInstructionEliminated(InstRef &IR) { in handleInstructionEliminated()
186 Error ExecuteStage::execute(InstRef &IR) { in execute()
253 const InstRef &IR, in notifyInstructionIssued()
272 void ExecuteStage::notifyReservedOrReleasedBuffers(const InstRef &IR, in notifyReservedOrReleasedBuffers()
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| H A D | InOrderIssueStage.cpp | 55 static bool hasResourceHazard(const ResourceManager &RM, const InstRef &IR) { in hasResourceHazard()
64 static unsigned findLastWriteBackCycle(const InstRef &IR) { in findLastWriteBackCycle()
77 static unsigned findFirstWriteBackCycle(const InstRef &IR) { in findFirstWriteBackCycle()
95 const InstRef &IR) { in checkRegisterHazard()
144 bool InOrderIssueStage::canExecute(const InstRef &IR, in canExecute()
190 const InstRef &IR, in notifyInstructionIssue()
201 static void notifyInstructionDispatch(const InstRef &IR, unsigned Ops, in notifyInstructionDispatch()
211 llvm::Error InOrderIssueStage::execute(InstRef &IR) { in execute()
222 llvm::Error InOrderIssueStage::tryIssue(InstRef &IR, unsigned *StallCycles) { in tryIssue()
280 InstRef &IR = *I; in updateIssuedInst() local
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| H A D | MicroOpQueueStage.cpp | 22 InstRef IR = Buffer[CurrentInstructionSlotIdx]; in moveInstructions() local
46 Error MicroOpQueueStage::execute(InstRef &IR) { in execute()
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| H A D | DispatchStage.cpp | 38 void DispatchStage::notifyInstructionDispatched(const InstRef &IR, in notifyInstructionDispatched()
78 Error DispatchStage::dispatch(InstRef IR) { in dispatch()
176 Error DispatchStage::execute(InstRef &IR) { in execute()
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| H A D | RetireStage.cpp | 49 llvm::Error RetireStage::execute(InstRef &IR) { in execute()
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| H A D | InstructionTables.cpp | 22 Error InstructionTables::execute(InstRef &IR) { in execute()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Passes/ |
| H A D | StandardInstrumentations.cpp | 192 const Module *unwrapModule(Any IR, bool Force = false) { in unwrapModule()
260 std::string getIRName(Any IR) { in getIRName()
301 bool shouldPrintIR(Any IR) { in shouldPrintIR()
326 void unwrapAndPrint(raw_ostream &OS, Any IR, in unwrapAndPrint()
396 bool ChangeReporter<IRUnitT>::isInteresting(Any IR, StringRef PassID) { in isInteresting()
405 void ChangeReporter<IRUnitT>::saveIRBeforePass(Any IR, StringRef PassID) { in saveIRBeforePass()
426 void ChangeReporter<IRUnitT>::handleIRAfterPass(Any IR, StringRef PassID) { in handleIRAfterPass()
471 [this](StringRef P, Any IR) { saveIRBeforePass(IR, P); }); in registerRequiredCallbacks()
474 [this](StringRef P, Any IR, const PreservedAnalyses &) { in registerRequiredCallbacks()
494 void TextChangeReporter<IRUnitT>::handleInitialIR(Any IR) { in handleInitialIR()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/MCA/Stages/ |
| H A D | Stage.h | 42 virtual bool isAvailable(const InstRef &IR) const { return true; } in isAvailable()
62 bool checkNextStage(const InstRef &IR) const { in checkNextStage()
70 Error moveToTheNextStage(InstRef &IR) { in moveToTheNextStage()
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| H A D | MicroOpQueueStage.h | 54 unsigned getNormalizedOpcodes(const InstRef &IR) const { in getNormalizedOpcodes()
67 bool isAvailable(const InstRef &IR) const override { in isAvailable()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/MCA/HardwareUnits/ |
| H A D | LSUnit.h | 115 void onGroupIssued(const InstRef &IR, bool ShouldUpdateCriticalDep) { in onGroupIssued()
135 void onInstructionIssued(const InstRef &IR) { in onInstructionIssued()
163 void onInstructionExecuted(const InstRef &IR) { in onInstructionExecuted()
276 bool isReady(const InstRef &IR) const { in isReady()
284 bool isPending(const InstRef &IR) const { in isPending()
292 bool isWaiting(const InstRef &IR) const { in isWaiting()
298 bool hasDependentUsers(const InstRef &IR) const { in hasDependentUsers()
328 virtual void onInstructionIssued(const InstRef &IR) { in onInstructionIssued()
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| H A D | RetireControlUnit.h | 52 InstRef IR; member
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/IR/ |
| H A D | PassManager.h | 421 getAnalysisResultUnpackTuple(AnalysisManagerT &AM, IRUnitT &IR, in getAnalysisResultUnpackTuple()
436 getAnalysisResult(AnalysisManager<IRUnitT, AnalysisArgTs...> &AM, IRUnitT &IR, in getAnalysisResult() argument
485 PreservedAnalyses run(IRUnitT &IR, AnalysisManagerT &AM, in run()
674 bool invalidate(IRUnitT &IR, const PreservedAnalyses &PA) { in invalidate()
688 bool invalidate(AnalysisKey *ID, IRUnitT &IR, const PreservedAnalyses &PA) { in invalidate()
696 bool invalidateImpl(AnalysisKey *ID, IRUnitT &IR, in invalidateImpl()
769 typename PassT::Result &getResult(IRUnitT &IR, ExtraArgTs... ExtraArgs) { in getResult()
788 typename PassT::Result *getCachedResult(IRUnitT &IR) const { in getCachedResult()
805 void verifyNotInvalidated(IRUnitT &IR, typename PassT::Result *Result) const { in verifyNotInvalidated()
875 ResultConceptT *getCachedResultImpl(AnalysisKey *ID, IRUnitT &IR) const { in getCachedResultImpl()
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| H A D | PassManagerImpl.h | 36 AnalysisManager<IRUnitT, ExtraArgTs...>::clear(IRUnitT &IR, in clear()
55 AnalysisKey *ID, IRUnitT &IR, ExtraArgTs... ExtraArgs) { in getResultImpl()
90 IRUnitT &IR, const PreservedAnalyses &PA) { in invalidate()
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| H A D | PassInstrumentation.h | 216 bool runBeforePass(const PassT &Pass, const IRUnitT &IR) const { in runBeforePass()
241 void runAfterPass(const PassT &Pass, const IRUnitT &IR, in runAfterPass()
262 void runBeforeAnalysis(const PassT &Analysis, const IRUnitT &IR) const { in runBeforeAnalysis()
271 void runAfterAnalysis(const PassT &Analysis, const IRUnitT &IR) const { in runAfterAnalysis()
281 void runAnalysisInvalidated(const PassT &Analysis, const IRUnitT &IR) const { in runAnalysisInvalidated()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/MCA/ |
| H A D | HWEventListener.h | 59 const InstRef &IR; variable
65 HWInstructionIssuedEvent(const InstRef &IR, in HWInstructionIssuedEvent()
74 HWInstructionDispatchedEvent(const InstRef &IR, ArrayRef<unsigned> Regs, in HWInstructionDispatchedEvent()
95 HWInstructionRetiredEvent(const InstRef &IR, ArrayRef<unsigned> Regs) in HWInstructionRetiredEvent()
126 const InstRef &IR; variable
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| /netbsd-src/external/apache2/llvm/dist/clang/tools/clang-fuzzer/handle-llvm/ |
| H A D | handle_llvm.cpp | 96 static std::string OptLLVM(const std::string &IR, CodeGenOpt::Level OLvl) { in OptLLVM()
154 static void CreateAndRunJITFunc(const std::string &IR, CodeGenOpt::Level OLvl) { in CreateAndRunJITFunc()
212 void clang_fuzzer::HandleLLVM(const std::string &IR, in HandleLLVM()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/MCA/ |
| H A D | Pipeline.cpp | 60 InstRef IR; in runCycle() local
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| /netbsd-src/sys/arch/alpha/pci/ |
| H A D | pci_1000.c | 171 #define IR() bus_space_read_2(another_mystery_icu_iot, \ macro
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | MachinePassManager.cpp | 43 PI.pushBeforeNonSkippedPassCallback([&MFAM](StringRef PassID, Any IR) { in run()
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| /netbsd-src/external/apache2/llvm/dist/clang/lib/StaticAnalyzer/Checkers/ |
| H A D | MacOSXAPIChecker.cpp | 58 if (const ObjCIvarRegion *IR = dyn_cast<ObjCIvarRegion>(SR)) in getParentIvarRegion() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/IPO/ |
| H A D | Inliner.cpp | 255 InlineResult IR = InlineFunction(CB, IFI, &AAR, InsertLifetime); in inlineCallIfPossible() local
445 InlineResult IR = inlineCallIfPossible( in inlineCallsImpl() local
831 InlineResult IR = in run() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/tools/llvm-mca/Views/ |
| H A D | BottleneckAnalysis.cpp | 118 for (const InstRef &IR : Event.AffectedInstructions) { in handlePressureEvent() local
131 for (const InstRef &IR : Event.AffectedInstructions) { in handlePressureEvent() local
138 for (const InstRef &IR : Event.AffectedInstructions) { in handlePressureEvent() local
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