1 /* $NetBSD: ti_iicreg.h,v 1.3 2019/10/31 10:21:29 jmcneill Exp $ */ 2 3 /* 4 * Copyright (c) 2013 Manuel Bouyer. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #ifndef _TI_IICREG_H 28 #define _TI_IICREG_H 29 30 #define I2C_SYSC_CLKACTIVITY_OCP 0x0010 31 #define I2C_SYSC_CLKACTIVITY_SYSTEM 0x0020 32 #define I2C_SYSC_IDLE_MASK 0x0018 33 #define I2C_SYSC_IDLE_FORCE 0x0000 34 #define I2C_SYSC_IDLE_SMART 0x0010 35 #define I2C_SYSC_IDLE_NONE 0x0008 36 #define I2C_SYSC_ENAWAKEUP 0x0004 37 #define I2C_SYSC_SRST 0x0002 38 #define I2C_SYSC_AUTOIDLE 0x0001 39 40 #define I2C_IRQSTATUS_XDR 0x4000 41 #define I2C_IRQSTATUS_RDR 0x2000 42 #define I2C_IRQSTATUS_BB 0x1000 43 #define I2C_IRQSTATUS_ROVR 0x0800 44 #define I2C_IRQSTATUS_XUDF 0x0400 45 #define I2C_IRQSTATUS_AAS 0x0200 46 #define I2C_IRQSTATUS_BF 0x0100 47 #define I2C_IRQSTATUS_AERR 0x0080 48 #define I2C_IRQSTATUS_STC 0x0040 49 #define I2C_IRQSTATUS_GC 0x0020 50 #define I2C_IRQSTATUS_XRDY 0x0010 51 #define I2C_IRQSTATUS_RRDY 0x0008 52 #define I2C_IRQSTATUS_ARDY 0x0004 53 #define I2C_IRQSTATUS_NACK 0x0002 54 #define I2C_IRQSTATUS_AL 0x0001 55 56 #define I2C_DMARXENABLE 0x0001 57 58 #define I2C_DMATXENABLE 0x0001 59 60 #define I2C_SYSS_RDONE 0x0001 61 62 #define I2C_BUF_RDMA_EN 0x8000 63 #define I2C_BUF_RXFIFO_CLR 0x4000 64 #define I2C_BUF_RXTRSH_MASK 0x3f00 65 #define I2C_BUF_RXTRSH(x) ((x) << 8) 66 #define I2C_BUF_XDMA_EN 0x0080 67 #define I2C_BUF_TXFIFO_CLR 0x0040 68 #define I2C_BUF_TXTRSH_MASK 0x003f 69 #define I2C_BUF_TXTRSH(x) ((x) << 0) 70 71 #define I2C_CNT_MASK 0xffff 72 73 #define I2C_DATA_MASK 0x00ff 74 75 #define I2C_CON_EN 0x8000 76 #define I2C_CON_STB 0x0800 77 #define I2C_CON_MST 0x0400 78 #define I2C_CON_TRX 0x0200 79 #define I2C_CON_XSA 0x0100 80 #define I2C_CON_XOA0 0x0080 81 #define I2C_CON_XOA1 0x0040 82 #define I2C_CON_XOA2 0x0020 83 #define I2C_CON_XOA3 0x0010 84 #define I2C_CON_STP 0x0002 85 #define I2C_CON_STT 0x0001 86 87 #define I2C_OA_MASK 0x03ff 88 89 #define I2C_SA_MASK 0x03ff 90 91 #define I2C_PSC_MASK 0x000f 92 93 #define I2C_SCLL_MASK 0x000f 94 95 #define I2C_SCLH_MASK 0x000f 96 97 #define I2C_BUFSTAT_FIFODEPTH(x) (((x) >> 14) & 0x03) 98 #define I2C_BUFSTAT_RXSTAT(x) (((x) >> 8) & 0x3f) 99 #define I2C_BUFSTAT_TXSTAT(x) (((x) >> 0) & 0x3f) 100 101 #define I2C_ACTOA_OA3_ACT 0x0008 102 #define I2C_ACTOA_OA2_ACT 0x0004 103 #define I2C_ACTOA_OA1_ACT 0x0002 104 #define I2C_ACTOA_OA0_ACT 0x0001 105 106 #endif /* _TI_IICREG_H */ 107