1 /* $NetBSD: omap2_gpmcreg.h,v 1.1 2019/11/01 11:53:35 jmcneill Exp $ */
2 /*
3 * Copyright (c) 2007 Microsoft
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by Microsoft
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
19 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT,
22 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
23 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 */
30
31 #ifndef _OMAP2430GPMCREG_H
32 #define _OMAP2430GPMCREG_H
33
34 /*
35 * Header for OMAP2 General Purpose Memory Controller
36 */
37
38 #define GPMC_REVISION 0x000
39 #define GPMC_SYSCONFIG 0x010
40 #define GPMC_SYSSTATUS 0x014
41 #define GPMC_IRQSTATUS 0x018
42 #define GPMC_IRQENABLE 0x01C
43 #define GPMC_TIMEOUT_CONTROL 0x040
44 #define GPMC_ERR_ADDRESS 0x044
45 #define GPMC_ERR_TYPE 0x048
46 #define GPMC_CONFIG 0x050
47 #define GPMC_STATUS 0x054
48 #define GPMC_CONFIG1_0 0x060
49 #define GPMC_CONFIG2_0 0x064
50 #define GPMC_CONFIG3_0 0x068
51 #define GPMC_CONFIG4_0 0x06C
52 #define GPMC_CONFIG5_0 0x070
53 #define GPMC_CONFIG6_0 0x074
54 #define GPMC_CONFIG7_0 0x078
55 #define GPMC_NAND_COMMAND_0 0x07C
56 #define GPMC_NAND_ADDRESS_0 0x080
57 #define GPMC_NAND_DATA_0 0x084
58 #define GPMC_CONFIG1_1 0x090
59 #define GPMC_CONFIG2_1 0x094
60 #define GPMC_CONFIG3_1 0x098
61 #define GPMC_CONFIG4_1 0x09C
62 #define GPMC_CONFIG5_1 0x0A0
63 #define GPMC_CONFIG6_1 0x0A4
64 #define GPMC_CONFIG7_1 0x0A8
65 #define GPMC_NAND_COMMAND_1 0x0AC
66 #define GPMC_NAND_ADDRESS_1 0x0B0
67 #define GPMC_NAND_DATA_1 0x0B4
68 #define GPMC_CONFIG1_2 0x0C0
69 #define GPMC_CONFIG2_2 0x0C4
70 #define GPMC_CONFIG3_2 0x0C8
71 #define GPMC_CONFIG4_2 0x0CC
72 #define GPMC_CONFIG5_2 0x0D0
73 #define GPMC_CONFIG6_2 0x0D4
74 #define GPMC_CONFIG7_2 0x0D8
75 #define GPMC_NAND_COMMAND_2 0x0DC
76 #define GPMC_NAND_ADDRESS_2 0x0E0
77 #define GPMC_NAND_DATA_2 0x0E4
78 #define GPMC_CONFIG1_3 0x0F0
79 #define GPMC_CONFIG2_3 0x0F4
80 #define GPMC_CONFIG3_3 0x0F8
81 #define GPMC_CONFIG4_3 0x0FC
82 #define GPMC_CONFIG5_3 0x100
83 #define GPMC_CONFIG6_3 0x104
84 #define GPMC_CONFIG7_3 0x108
85 #define GPMC_NAND_COMMAND_3 0x10C
86 #define GPMC_NAND_ADDRESS_3 0x110
87 #define GPMC_NAND_DATA_3 0x114
88 #define GPMC_CONFIG1_4 0x120
89 #define GPMC_CONFIG2_4 0x124
90 #define GPMC_CONFIG3_4 0x128
91 #define GPMC_CONFIG4_4 0x12C
92 #define GPMC_CONFIG5_4 0x130
93 #define GPMC_CONFIG6_4 0x134
94 #define GPMC_CONFIG7_4 0x138
95 #define GPMC_NAND_COMMAND_4 0x13C
96 #define GPMC_NAND_ADDRESS_4 0x140
97 #define GPMC_NAND_DATA_4 0x144
98 #define GPMC_CONFIG1_5 0x150
99 #define GPMC_CONFIG2_5 0x154
100 #define GPMC_CONFIG3_5 0x158
101 #define GPMC_CONFIG4_5 0x15C
102 #define GPMC_CONFIG5_5 0x160
103 #define GPMC_CONFIG6_5 0x164
104 #define GPMC_CONFIG7_5 0x168
105 #define GPMC_NAND_COMMAND_5 0x16C
106 #define GPMC_NAND_ADDRESS_5 0x170
107 #define GPMC_NAND_DATA_5 0x174
108 #define GPMC_CONFIG1_6 0x180
109 #define GPMC_CONFIG2_6 0x184
110 #define GPMC_CONFIG3_6 0x188
111 #define GPMC_CONFIG4_6 0x18C
112 #define GPMC_CONFIG5_6 0x190
113 #define GPMC_CONFIG6_6 0x194
114 #define GPMC_CONFIG7_6 0x198
115 #define GPMC_NAND_COMMAND_6 0x19C
116 #define GPMC_NAND_ADDRESS_6 0x1A0
117 #define GPMC_NAND_DATA_6 0x1A4
118 #define GPMC_CONFIG1_7 0x1B0
119 #define GPMC_CONFIG2_7 0x1B4
120 #define GPMC_CONFIG3_7 0x1B8
121 #define GPMC_CONFIG4_7 0x1BC
122 #define GPMC_CONFIG5_7 0x1C0
123 #define GPMC_CONFIG6_7 0x1C4
124 #define GPMC_CONFIG7_7 0x1C8
125 #define GPMC_NAND_COMMAND_7 0x1CC
126 #define GPMC_NAND_ADDRESS_7 0x1D0
127 #define GPMC_NAND_DATA_7 0x1D4
128 #define GPMC_PREFETCH_CONFIG1 0x1E0
129 #define GPMC_PREFETCH_CONFIG2 0x1E4
130 #define GPMC_PREFETCH_CONTROL 0x1EC
131 #define GPMC_CONFIG1_6 0x180
132 #define GPMC_CONFIG2_6 0x184
133 #define GPMC_CONFIG3_6 0x188
134 #define GPMC_CONFIG4_6 0x18C
135 #define GPMC_CONFIG5_6 0x190
136 #define GPMC_CONFIG6_6 0x194
137 #define GPMC_CONFIG7_6 0x198
138 #define GPMC_NAND_COMMAND_6 0x19C
139 #define GPMC_NAND_ADDRESS_6 0x1A0
140 #define GPMC_NAND_DATA_6 0x1A4
141 #define GPMC_CONFIG1_7 0x1B0
142 #define GPMC_CONFIG2_7 0x1B4
143 #define GPMC_CONFIG3_7 0x1B8
144 #define GPMC_CONFIG4_7 0x1BC
145 #define GPMC_CONFIG5_7 0x1C0
146 #define GPMC_CONFIG6_7 0x1C4
147 #define GPMC_CONFIG7_7 0x1C8
148 #define GPMC_NAND_COMMAND_7 0x1CC
149 #define GPMC_NAND_ADDRESS_7 0x1D0
150 #define GPMC_NAND_DATA_7 0x1D4
151 #define GPMC_PREFETCH_CONFIG1 0x1E0
152 #define GPMC_PREFETCH_CONFIG2 0x1E4
153 #define GPMC_PREFETCH_CONTROL 0x1EC
154 #define GPMC_PREFETCH_STATUS 0x1F0
155 #define GPMC_ECC_CONFIG 0x1F4
156 #define GPMC_ECC_CONTROL 0x1F8
157 #define GPMC_ECC_SIZE_CONFIG 0x1FC
158 #define GPMC_ECC1_RESULT 0x200
159 #define GPMC_ECC2_RESULT 0x204
160 #define GPMC_ECC3_RESULT 0x208
161 #define GPMC_ECC4_RESULT 0x20C
162 #define GPMC_ECC5_RESULT 0x210
163 #define GPMC_ECC6_RESULT 0x214
164 #define GPMC_ECC7_RESULT 0x218
165 #define GPMC_ECC8_RESULT 0x21C
166 #define GPMC_ECC9_RESULT 0x220
167 #define GPMC_TESTMODE_CTRL 0x230
168 #define GPMC_PSA_LSB 0x234
169 #define GPMC_PSA_MSB 0x238
170
171 #define GPMC_SIZE (GPMC_PSA_MSB + 4)
172 #define GPMC_NCS 8 /* # Chip Selects */
173 #define GPMC_CS_SIZE (GPMC_CONFIG1_1 - GPMC_CONFIG1_0)
174
175 #define GPMC_CS_CONFIG_BASE(base, cs) \
176 ((base) + GPMC_CONFIG1_0 + (cs) * GPMC_CS_SIZE)
177 #define GPMC_CS_CONFIG(cs) \
178 (GPMC_CONFIG1_0 + (cs) * GPMC_CS_SIZE)
179
180 #define GPMC_CONFIG1_i (GPMC_CONFIG1_0 - GPMC_CONFIG1_0)
181 #define GPMC_CONFIG2_i (GPMC_CONFIG2_0 - GPMC_CONFIG1_0)
182 #define GPMC_CONFIG3_i (GPMC_CONFIG3_0 - GPMC_CONFIG1_0)
183 #define GPMC_CONFIG4_i (GPMC_CONFIG4_0 - GPMC_CONFIG1_0)
184 #define GPMC_CONFIG5_i (GPMC_CONFIG5_0 - GPMC_CONFIG1_0)
185 #define GPMC_CONFIG6_i (GPMC_CONFIG6_0 - GPMC_CONFIG1_0)
186 #define GPMC_CONFIG7_i (GPMC_CONFIG7_0 - GPMC_CONFIG1_0)
187
188 /*
189 * GPMC OMAP2430_GPMC_REVISION
190 */
191 #define GPMC_REVISION_REV __BITS(7,0)
192 #define GPMC_REVISION_REV_MAJ(r) (((r) >> 4) & 0xf)
193 #define GPMC_REVISION_REV_MIN(r) (((r) >> 0) & 0xf)
194
195 /*
196 * GPMC CONFIG7_[0-7] bits
197 */
198 #define GPMC_CONFIG7_BASEADDRESS __BITS(5,0)
199 #define GPMC_CONFIG7_CSVALID __BIT(6)
200 #define GPMC_CONFIG7_MASKADDRESS __BITS(11,8)
201 #define GPMC_CONFIG7(m, b) (((m) << 8) | (((b) >> 24) & 0x3f))
202 #define GPMC_CONFIG7_MASK_256M 0x0
203 #define GPMC_CONFIG7_MASK_128M 0x8
204 #define GPMC_CONFIG7_MASK_64M 0xc
205 #define GPMC_CONFIG7_MASK_32M 0xe
206 #define GPMC_CONFIG7_MASK_16M 0xf
207
208 static __inline ulong
omap_gpmc_config7_addr(uint32_t r)209 omap_gpmc_config7_addr(uint32_t r)
210 {
211 return ((r) & GPMC_CONFIG7_BASEADDRESS) << 24;
212 }
213 static __inline ulong
omap_gpmc_config7_size(uint32_t r)214 omap_gpmc_config7_size(uint32_t r)
215 {
216 uint i;
217 uint mask;
218 const struct {
219 uint mask;
220 ulong size;
221 } gpmc_config7_size_tab[5] = {
222 { GPMC_CONFIG7_MASK_256M, (256 << 20) },
223 { GPMC_CONFIG7_MASK_128M, (128 << 20) },
224 { GPMC_CONFIG7_MASK_64M, ( 64 << 20) },
225 { GPMC_CONFIG7_MASK_32M, ( 32 << 20) },
226 { GPMC_CONFIG7_MASK_16M, ( 16 << 20) },
227 };
228 mask = ((r) & GPMC_CONFIG7_MASKADDRESS) >> 8;
229 for (i=0; i < 5; i++) {
230 if (gpmc_config7_size_tab[i].mask == mask)
231 return gpmc_config7_size_tab[i].size;
232 }
233 return 0;
234 }
235
236 #endif /* _OMAP2430GPMCREG_H */
237