1 //===- llvm/CodeGen/SelectionDAG.h - InstSelection DAG ----------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file declares the SelectionDAG class, and transitively defines the 10 // SDNode class and subclasses. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_CODEGEN_SELECTIONDAG_H 15 #define LLVM_CODEGEN_SELECTIONDAG_H 16 17 #include "llvm/ADT/ArrayRef.h" 18 #include "llvm/ADT/DenseMap.h" 19 #include "llvm/ADT/DenseSet.h" 20 #include "llvm/ADT/FoldingSet.h" 21 #include "llvm/ADT/SmallVector.h" 22 #include "llvm/ADT/StringMap.h" 23 #include "llvm/ADT/ilist.h" 24 #include "llvm/ADT/iterator.h" 25 #include "llvm/ADT/iterator_range.h" 26 #include "llvm/CodeGen/DAGCombine.h" 27 #include "llvm/CodeGen/ISDOpcodes.h" 28 #include "llvm/CodeGen/MachineFunction.h" 29 #include "llvm/CodeGen/MachineMemOperand.h" 30 #include "llvm/CodeGen/MachinePassManager.h" 31 #include "llvm/CodeGen/SelectionDAGNodes.h" 32 #include "llvm/CodeGen/ValueTypes.h" 33 #include "llvm/CodeGenTypes/MachineValueType.h" 34 #include "llvm/IR/ConstantRange.h" 35 #include "llvm/IR/DebugLoc.h" 36 #include "llvm/IR/Metadata.h" 37 #include "llvm/IR/RuntimeLibcalls.h" 38 #include "llvm/Support/Allocator.h" 39 #include "llvm/Support/ArrayRecycler.h" 40 #include "llvm/Support/CodeGen.h" 41 #include "llvm/Support/ErrorHandling.h" 42 #include "llvm/Support/RecyclingAllocator.h" 43 #include <cassert> 44 #include <cstdint> 45 #include <functional> 46 #include <map> 47 #include <set> 48 #include <string> 49 #include <tuple> 50 #include <utility> 51 #include <vector> 52 53 namespace llvm { 54 55 class DIExpression; 56 class DILabel; 57 class DIVariable; 58 class Function; 59 class Pass; 60 class Type; 61 template <class GraphType> struct GraphTraits; 62 template <typename T, unsigned int N> class SmallSetVector; 63 template <typename T, typename Enable> struct FoldingSetTrait; 64 class BatchAAResults; 65 class BlockAddress; 66 class BlockFrequencyInfo; 67 class Constant; 68 class ConstantFP; 69 class ConstantInt; 70 class DataLayout; 71 struct fltSemantics; 72 class FunctionLoweringInfo; 73 class FunctionVarLocs; 74 class GlobalValue; 75 struct KnownBits; 76 class LLVMContext; 77 class MachineBasicBlock; 78 class MachineConstantPoolValue; 79 class MachineModuleInfo; 80 class MCSymbol; 81 class OptimizationRemarkEmitter; 82 class ProfileSummaryInfo; 83 class SDDbgValue; 84 class SDDbgOperand; 85 class SDDbgLabel; 86 class SelectionDAG; 87 class SelectionDAGTargetInfo; 88 class TargetLibraryInfo; 89 class TargetLowering; 90 class TargetMachine; 91 class TargetSubtargetInfo; 92 class Value; 93 94 template <typename T> class GenericSSAContext; 95 using SSAContext = GenericSSAContext<Function>; 96 template <typename T> class GenericUniformityInfo; 97 using UniformityInfo = GenericUniformityInfo<SSAContext>; 98 99 class SDVTListNode : public FoldingSetNode { 100 friend struct FoldingSetTrait<SDVTListNode>; 101 102 /// A reference to an Interned FoldingSetNodeID for this node. 103 /// The Allocator in SelectionDAG holds the data. 104 /// SDVTList contains all types which are frequently accessed in SelectionDAG. 105 /// The size of this list is not expected to be big so it won't introduce 106 /// a memory penalty. 107 FoldingSetNodeIDRef FastID; 108 const EVT *VTs; 109 unsigned int NumVTs; 110 /// The hash value for SDVTList is fixed, so cache it to avoid 111 /// hash calculation. 112 unsigned HashValue; 113 114 public: 115 SDVTListNode(const FoldingSetNodeIDRef ID, const EVT *VT, unsigned int Num) : 116 FastID(ID), VTs(VT), NumVTs(Num) { 117 HashValue = ID.ComputeHash(); 118 } 119 120 SDVTList getSDVTList() { 121 SDVTList result = {VTs, NumVTs}; 122 return result; 123 } 124 }; 125 126 /// Specialize FoldingSetTrait for SDVTListNode 127 /// to avoid computing temp FoldingSetNodeID and hash value. 128 template<> struct FoldingSetTrait<SDVTListNode> : DefaultFoldingSetTrait<SDVTListNode> { 129 static void Profile(const SDVTListNode &X, FoldingSetNodeID& ID) { 130 ID = X.FastID; 131 } 132 133 static bool Equals(const SDVTListNode &X, const FoldingSetNodeID &ID, 134 unsigned IDHash, FoldingSetNodeID &TempID) { 135 if (X.HashValue != IDHash) 136 return false; 137 return ID == X.FastID; 138 } 139 140 static unsigned ComputeHash(const SDVTListNode &X, FoldingSetNodeID &TempID) { 141 return X.HashValue; 142 } 143 }; 144 145 template <> struct ilist_alloc_traits<SDNode> { 146 static void deleteNode(SDNode *) { 147 llvm_unreachable("ilist_traits<SDNode> shouldn't see a deleteNode call!"); 148 } 149 }; 150 151 /// Keeps track of dbg_value information through SDISel. We do 152 /// not build SDNodes for these so as not to perturb the generated code; 153 /// instead the info is kept off to the side in this structure. Each SDNode may 154 /// have one or more associated dbg_value entries. This information is kept in 155 /// DbgValMap. 156 /// Byval parameters are handled separately because they don't use alloca's, 157 /// which busts the normal mechanism. There is good reason for handling all 158 /// parameters separately: they may not have code generated for them, they 159 /// should always go at the beginning of the function regardless of other code 160 /// motion, and debug info for them is potentially useful even if the parameter 161 /// is unused. Right now only byval parameters are handled separately. 162 class SDDbgInfo { 163 BumpPtrAllocator Alloc; 164 SmallVector<SDDbgValue*, 32> DbgValues; 165 SmallVector<SDDbgValue*, 32> ByvalParmDbgValues; 166 SmallVector<SDDbgLabel*, 4> DbgLabels; 167 using DbgValMapType = DenseMap<const SDNode *, SmallVector<SDDbgValue *, 2>>; 168 DbgValMapType DbgValMap; 169 170 public: 171 SDDbgInfo() = default; 172 SDDbgInfo(const SDDbgInfo &) = delete; 173 SDDbgInfo &operator=(const SDDbgInfo &) = delete; 174 175 void add(SDDbgValue *V, bool isParameter); 176 177 void add(SDDbgLabel *L) { DbgLabels.push_back(L); } 178 179 /// Invalidate all DbgValues attached to the node and remove 180 /// it from the Node-to-DbgValues map. 181 void erase(const SDNode *Node); 182 183 void clear() { 184 DbgValMap.clear(); 185 DbgValues.clear(); 186 ByvalParmDbgValues.clear(); 187 DbgLabels.clear(); 188 Alloc.Reset(); 189 } 190 191 BumpPtrAllocator &getAlloc() { return Alloc; } 192 193 bool empty() const { 194 return DbgValues.empty() && ByvalParmDbgValues.empty() && DbgLabels.empty(); 195 } 196 197 ArrayRef<SDDbgValue*> getSDDbgValues(const SDNode *Node) const { 198 auto I = DbgValMap.find(Node); 199 if (I != DbgValMap.end()) 200 return I->second; 201 return ArrayRef<SDDbgValue*>(); 202 } 203 204 using DbgIterator = SmallVectorImpl<SDDbgValue*>::iterator; 205 using DbgLabelIterator = SmallVectorImpl<SDDbgLabel*>::iterator; 206 207 DbgIterator DbgBegin() { return DbgValues.begin(); } 208 DbgIterator DbgEnd() { return DbgValues.end(); } 209 DbgIterator ByvalParmDbgBegin() { return ByvalParmDbgValues.begin(); } 210 DbgIterator ByvalParmDbgEnd() { return ByvalParmDbgValues.end(); } 211 DbgLabelIterator DbgLabelBegin() { return DbgLabels.begin(); } 212 DbgLabelIterator DbgLabelEnd() { return DbgLabels.end(); } 213 }; 214 215 void checkForCycles(const SelectionDAG *DAG, bool force = false); 216 217 /// This is used to represent a portion of an LLVM function in a low-level 218 /// Data Dependence DAG representation suitable for instruction selection. 219 /// This DAG is constructed as the first step of instruction selection in order 220 /// to allow implementation of machine specific optimizations 221 /// and code simplifications. 222 /// 223 /// The representation used by the SelectionDAG is a target-independent 224 /// representation, which has some similarities to the GCC RTL representation, 225 /// but is significantly more simple, powerful, and is a graph form instead of a 226 /// linear form. 227 /// 228 class SelectionDAG { 229 const TargetMachine &TM; 230 const SelectionDAGTargetInfo *TSI = nullptr; 231 const TargetLowering *TLI = nullptr; 232 const TargetLibraryInfo *LibInfo = nullptr; 233 const FunctionVarLocs *FnVarLocs = nullptr; 234 MachineFunction *MF; 235 MachineFunctionAnalysisManager *MFAM = nullptr; 236 Pass *SDAGISelPass = nullptr; 237 LLVMContext *Context; 238 CodeGenOptLevel OptLevel; 239 240 UniformityInfo *UA = nullptr; 241 FunctionLoweringInfo * FLI = nullptr; 242 243 /// The function-level optimization remark emitter. Used to emit remarks 244 /// whenever manipulating the DAG. 245 OptimizationRemarkEmitter *ORE; 246 247 ProfileSummaryInfo *PSI = nullptr; 248 BlockFrequencyInfo *BFI = nullptr; 249 MachineModuleInfo *MMI = nullptr; 250 251 /// Extended EVTs used for single value VTLists. 252 std::set<EVT, EVT::compareRawBits> EVTs; 253 254 /// List of non-single value types. 255 FoldingSet<SDVTListNode> VTListMap; 256 257 /// Pool allocation for misc. objects that are created once per SelectionDAG. 258 BumpPtrAllocator Allocator; 259 260 /// The starting token. 261 SDNode EntryNode; 262 263 /// The root of the entire DAG. 264 SDValue Root; 265 266 /// A linked list of nodes in the current DAG. 267 ilist<SDNode> AllNodes; 268 269 /// The AllocatorType for allocating SDNodes. We use 270 /// pool allocation with recycling. 271 using NodeAllocatorType = RecyclingAllocator<BumpPtrAllocator, SDNode, 272 sizeof(LargestSDNode), 273 alignof(MostAlignedSDNode)>; 274 275 /// Pool allocation for nodes. 276 NodeAllocatorType NodeAllocator; 277 278 /// This structure is used to memoize nodes, automatically performing 279 /// CSE with existing nodes when a duplicate is requested. 280 FoldingSet<SDNode> CSEMap; 281 282 /// Pool allocation for machine-opcode SDNode operands. 283 BumpPtrAllocator OperandAllocator; 284 ArrayRecycler<SDUse> OperandRecycler; 285 286 /// Tracks dbg_value and dbg_label information through SDISel. 287 SDDbgInfo *DbgInfo; 288 289 using CallSiteInfo = MachineFunction::CallSiteInfo; 290 using CalledGlobalInfo = MachineFunction::CalledGlobalInfo; 291 292 struct NodeExtraInfo { 293 CallSiteInfo CSInfo; 294 MDNode *HeapAllocSite = nullptr; 295 MDNode *PCSections = nullptr; 296 MDNode *MMRA = nullptr; 297 CalledGlobalInfo CalledGlobal{}; 298 bool NoMerge = false; 299 }; 300 /// Out-of-line extra information for SDNodes. 301 DenseMap<const SDNode *, NodeExtraInfo> SDEI; 302 303 /// PersistentId counter to be used when inserting the next 304 /// SDNode to this SelectionDAG. We do not place that under 305 /// `#if LLVM_ENABLE_ABI_BREAKING_CHECKS` intentionally because 306 /// it adds unneeded complexity without noticeable 307 /// benefits (see discussion with @thakis in D120714). 308 uint16_t NextPersistentId = 0; 309 310 public: 311 /// Clients of various APIs that cause global effects on 312 /// the DAG can optionally implement this interface. This allows the clients 313 /// to handle the various sorts of updates that happen. 314 /// 315 /// A DAGUpdateListener automatically registers itself with DAG when it is 316 /// constructed, and removes itself when destroyed in RAII fashion. 317 struct DAGUpdateListener { 318 DAGUpdateListener *const Next; 319 SelectionDAG &DAG; 320 321 explicit DAGUpdateListener(SelectionDAG &D) 322 : Next(D.UpdateListeners), DAG(D) { 323 DAG.UpdateListeners = this; 324 } 325 326 virtual ~DAGUpdateListener() { 327 assert(DAG.UpdateListeners == this && 328 "DAGUpdateListeners must be destroyed in LIFO order"); 329 DAG.UpdateListeners = Next; 330 } 331 332 /// The node N that was deleted and, if E is not null, an 333 /// equivalent node E that replaced it. 334 virtual void NodeDeleted(SDNode *N, SDNode *E); 335 336 /// The node N that was updated. 337 virtual void NodeUpdated(SDNode *N); 338 339 /// The node N that was inserted. 340 virtual void NodeInserted(SDNode *N); 341 }; 342 343 struct DAGNodeDeletedListener : public DAGUpdateListener { 344 std::function<void(SDNode *, SDNode *)> Callback; 345 346 DAGNodeDeletedListener(SelectionDAG &DAG, 347 std::function<void(SDNode *, SDNode *)> Callback) 348 : DAGUpdateListener(DAG), Callback(std::move(Callback)) {} 349 350 void NodeDeleted(SDNode *N, SDNode *E) override { Callback(N, E); } 351 352 private: 353 virtual void anchor(); 354 }; 355 356 struct DAGNodeInsertedListener : public DAGUpdateListener { 357 std::function<void(SDNode *)> Callback; 358 359 DAGNodeInsertedListener(SelectionDAG &DAG, 360 std::function<void(SDNode *)> Callback) 361 : DAGUpdateListener(DAG), Callback(std::move(Callback)) {} 362 363 void NodeInserted(SDNode *N) override { Callback(N); } 364 365 private: 366 virtual void anchor(); 367 }; 368 369 /// Help to insert SDNodeFlags automatically in transforming. Use 370 /// RAII to save and resume flags in current scope. 371 class FlagInserter { 372 SelectionDAG &DAG; 373 SDNodeFlags Flags; 374 FlagInserter *LastInserter; 375 376 public: 377 FlagInserter(SelectionDAG &SDAG, SDNodeFlags Flags) 378 : DAG(SDAG), Flags(Flags), 379 LastInserter(SDAG.getFlagInserter()) { 380 SDAG.setFlagInserter(this); 381 } 382 FlagInserter(SelectionDAG &SDAG, SDNode *N) 383 : FlagInserter(SDAG, N->getFlags()) {} 384 385 FlagInserter(const FlagInserter &) = delete; 386 FlagInserter &operator=(const FlagInserter &) = delete; 387 ~FlagInserter() { DAG.setFlagInserter(LastInserter); } 388 389 SDNodeFlags getFlags() const { return Flags; } 390 }; 391 392 /// When true, additional steps are taken to 393 /// ensure that getConstant() and similar functions return DAG nodes that 394 /// have legal types. This is important after type legalization since 395 /// any illegally typed nodes generated after this point will not experience 396 /// type legalization. 397 bool NewNodesMustHaveLegalTypes = false; 398 399 private: 400 /// DAGUpdateListener is a friend so it can manipulate the listener stack. 401 friend struct DAGUpdateListener; 402 403 /// Linked list of registered DAGUpdateListener instances. 404 /// This stack is maintained by DAGUpdateListener RAII. 405 DAGUpdateListener *UpdateListeners = nullptr; 406 407 /// Implementation of setSubgraphColor. 408 /// Return whether we had to truncate the search. 409 bool setSubgraphColorHelper(SDNode *N, const char *Color, 410 DenseSet<SDNode *> &visited, 411 int level, bool &printed); 412 413 template <typename SDNodeT, typename... ArgTypes> 414 SDNodeT *newSDNode(ArgTypes &&... Args) { 415 return new (NodeAllocator.template Allocate<SDNodeT>()) 416 SDNodeT(std::forward<ArgTypes>(Args)...); 417 } 418 419 /// Build a synthetic SDNodeT with the given args and extract its subclass 420 /// data as an integer (e.g. for use in a folding set). 421 /// 422 /// The args to this function are the same as the args to SDNodeT's 423 /// constructor, except the second arg (assumed to be a const DebugLoc&) is 424 /// omitted. 425 template <typename SDNodeT, typename... ArgTypes> 426 static uint16_t getSyntheticNodeSubclassData(unsigned IROrder, 427 ArgTypes &&... Args) { 428 // The compiler can reduce this expression to a constant iff we pass an 429 // empty DebugLoc. Thankfully, the debug location doesn't have any bearing 430 // on the subclass data. 431 return SDNodeT(IROrder, DebugLoc(), std::forward<ArgTypes>(Args)...) 432 .getRawSubclassData(); 433 } 434 435 template <typename SDNodeTy> 436 static uint16_t getSyntheticNodeSubclassData(unsigned Opc, unsigned Order, 437 SDVTList VTs, EVT MemoryVT, 438 MachineMemOperand *MMO) { 439 return SDNodeTy(Opc, Order, DebugLoc(), VTs, MemoryVT, MMO) 440 .getRawSubclassData(); 441 } 442 443 void createOperands(SDNode *Node, ArrayRef<SDValue> Vals); 444 445 void removeOperands(SDNode *Node) { 446 if (!Node->OperandList) 447 return; 448 OperandRecycler.deallocate( 449 ArrayRecycler<SDUse>::Capacity::get(Node->NumOperands), 450 Node->OperandList); 451 Node->NumOperands = 0; 452 Node->OperandList = nullptr; 453 } 454 void CreateTopologicalOrder(std::vector<SDNode*>& Order); 455 456 public: 457 // Maximum depth for recursive analysis such as computeKnownBits, etc. 458 static constexpr unsigned MaxRecursionDepth = 6; 459 460 // Returns the maximum steps for SDNode->hasPredecessor() like searches. 461 static unsigned getHasPredecessorMaxSteps(); 462 463 explicit SelectionDAG(const TargetMachine &TM, CodeGenOptLevel); 464 SelectionDAG(const SelectionDAG &) = delete; 465 SelectionDAG &operator=(const SelectionDAG &) = delete; 466 ~SelectionDAG(); 467 468 /// Prepare this SelectionDAG to process code in the given MachineFunction. 469 void init(MachineFunction &NewMF, OptimizationRemarkEmitter &NewORE, 470 Pass *PassPtr, const TargetLibraryInfo *LibraryInfo, 471 UniformityInfo *UA, ProfileSummaryInfo *PSIin, 472 BlockFrequencyInfo *BFIin, MachineModuleInfo &MMI, 473 FunctionVarLocs const *FnVarLocs); 474 475 void init(MachineFunction &NewMF, OptimizationRemarkEmitter &NewORE, 476 MachineFunctionAnalysisManager &AM, 477 const TargetLibraryInfo *LibraryInfo, UniformityInfo *UA, 478 ProfileSummaryInfo *PSIin, BlockFrequencyInfo *BFIin, 479 MachineModuleInfo &MMI, FunctionVarLocs const *FnVarLocs) { 480 init(NewMF, NewORE, nullptr, LibraryInfo, UA, PSIin, BFIin, MMI, FnVarLocs); 481 MFAM = &AM; 482 } 483 484 void setFunctionLoweringInfo(FunctionLoweringInfo * FuncInfo) { 485 FLI = FuncInfo; 486 } 487 488 /// Clear state and free memory necessary to make this 489 /// SelectionDAG ready to process a new block. 490 void clear(); 491 492 MachineFunction &getMachineFunction() const { return *MF; } 493 const Pass *getPass() const { return SDAGISelPass; } 494 MachineFunctionAnalysisManager *getMFAM() { return MFAM; } 495 496 CodeGenOptLevel getOptLevel() const { return OptLevel; } 497 const DataLayout &getDataLayout() const { return MF->getDataLayout(); } 498 const TargetMachine &getTarget() const { return TM; } 499 const TargetSubtargetInfo &getSubtarget() const { return MF->getSubtarget(); } 500 template <typename STC> const STC &getSubtarget() const { 501 return MF->getSubtarget<STC>(); 502 } 503 const TargetLowering &getTargetLoweringInfo() const { return *TLI; } 504 const TargetLibraryInfo &getLibInfo() const { return *LibInfo; } 505 const SelectionDAGTargetInfo &getSelectionDAGInfo() const { return *TSI; } 506 const UniformityInfo *getUniformityInfo() const { return UA; } 507 /// Returns the result of the AssignmentTrackingAnalysis pass if it's 508 /// available, otherwise return nullptr. 509 const FunctionVarLocs *getFunctionVarLocs() const { return FnVarLocs; } 510 LLVMContext *getContext() const { return Context; } 511 OptimizationRemarkEmitter &getORE() const { return *ORE; } 512 ProfileSummaryInfo *getPSI() const { return PSI; } 513 BlockFrequencyInfo *getBFI() const { return BFI; } 514 MachineModuleInfo *getMMI() const { return MMI; } 515 516 FlagInserter *getFlagInserter() { return Inserter; } 517 void setFlagInserter(FlagInserter *FI) { Inserter = FI; } 518 519 /// Just dump dot graph to a user-provided path and title. 520 /// This doesn't open the dot viewer program and 521 /// helps visualization when outside debugging session. 522 /// FileName expects absolute path. If provided 523 /// without any path separators then the file 524 /// will be created in the current directory. 525 /// Error will be emitted if the path is insane. 526 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 527 LLVM_DUMP_METHOD void dumpDotGraph(const Twine &FileName, const Twine &Title); 528 #endif 529 530 /// Pop up a GraphViz/gv window with the DAG rendered using 'dot'. 531 void viewGraph(const std::string &Title); 532 void viewGraph(); 533 534 #if LLVM_ENABLE_ABI_BREAKING_CHECKS 535 std::map<const SDNode *, std::string> NodeGraphAttrs; 536 #endif 537 538 /// Clear all previously defined node graph attributes. 539 /// Intended to be used from a debugging tool (eg. gdb). 540 void clearGraphAttrs(); 541 542 /// Set graph attributes for a node. (eg. "color=red".) 543 void setGraphAttrs(const SDNode *N, const char *Attrs); 544 545 /// Get graph attributes for a node. (eg. "color=red".) 546 /// Used from getNodeAttributes. 547 std::string getGraphAttrs(const SDNode *N) const; 548 549 /// Convenience for setting node color attribute. 550 void setGraphColor(const SDNode *N, const char *Color); 551 552 /// Convenience for setting subgraph color attribute. 553 void setSubgraphColor(SDNode *N, const char *Color); 554 555 using allnodes_const_iterator = ilist<SDNode>::const_iterator; 556 557 allnodes_const_iterator allnodes_begin() const { return AllNodes.begin(); } 558 allnodes_const_iterator allnodes_end() const { return AllNodes.end(); } 559 560 using allnodes_iterator = ilist<SDNode>::iterator; 561 562 allnodes_iterator allnodes_begin() { return AllNodes.begin(); } 563 allnodes_iterator allnodes_end() { return AllNodes.end(); } 564 565 ilist<SDNode>::size_type allnodes_size() const { 566 return AllNodes.size(); 567 } 568 569 iterator_range<allnodes_iterator> allnodes() { 570 return make_range(allnodes_begin(), allnodes_end()); 571 } 572 iterator_range<allnodes_const_iterator> allnodes() const { 573 return make_range(allnodes_begin(), allnodes_end()); 574 } 575 576 /// Return the root tag of the SelectionDAG. 577 const SDValue &getRoot() const { return Root; } 578 579 /// Return the token chain corresponding to the entry of the function. 580 SDValue getEntryNode() const { 581 return SDValue(const_cast<SDNode *>(&EntryNode), 0); 582 } 583 584 /// Set the current root tag of the SelectionDAG. 585 /// 586 const SDValue &setRoot(SDValue N) { 587 assert((!N.getNode() || N.getValueType() == MVT::Other) && 588 "DAG root value is not a chain!"); 589 if (N.getNode()) 590 checkForCycles(N.getNode(), this); 591 Root = N; 592 if (N.getNode()) 593 checkForCycles(this); 594 return Root; 595 } 596 597 #if !defined(NDEBUG) && LLVM_ENABLE_ABI_BREAKING_CHECKS 598 void VerifyDAGDivergence(); 599 #endif 600 601 /// This iterates over the nodes in the SelectionDAG, folding 602 /// certain types of nodes together, or eliminating superfluous nodes. The 603 /// Level argument controls whether Combine is allowed to produce nodes and 604 /// types that are illegal on the target. 605 void Combine(CombineLevel Level, BatchAAResults *BatchAA, 606 CodeGenOptLevel OptLevel); 607 608 /// This transforms the SelectionDAG into a SelectionDAG that 609 /// only uses types natively supported by the target. 610 /// Returns "true" if it made any changes. 611 /// 612 /// Note that this is an involved process that may invalidate pointers into 613 /// the graph. 614 bool LegalizeTypes(); 615 616 /// This transforms the SelectionDAG into a SelectionDAG that is 617 /// compatible with the target instruction selector, as indicated by the 618 /// TargetLowering object. 619 /// 620 /// Note that this is an involved process that may invalidate pointers into 621 /// the graph. 622 void Legalize(); 623 624 /// Transforms a SelectionDAG node and any operands to it into a node 625 /// that is compatible with the target instruction selector, as indicated by 626 /// the TargetLowering object. 627 /// 628 /// \returns true if \c N is a valid, legal node after calling this. 629 /// 630 /// This essentially runs a single recursive walk of the \c Legalize process 631 /// over the given node (and its operands). This can be used to incrementally 632 /// legalize the DAG. All of the nodes which are directly replaced, 633 /// potentially including N, are added to the output parameter \c 634 /// UpdatedNodes so that the delta to the DAG can be understood by the 635 /// caller. 636 /// 637 /// When this returns false, N has been legalized in a way that make the 638 /// pointer passed in no longer valid. It may have even been deleted from the 639 /// DAG, and so it shouldn't be used further. When this returns true, the 640 /// N passed in is a legal node, and can be immediately processed as such. 641 /// This may still have done some work on the DAG, and will still populate 642 /// UpdatedNodes with any new nodes replacing those originally in the DAG. 643 bool LegalizeOp(SDNode *N, SmallSetVector<SDNode *, 16> &UpdatedNodes); 644 645 /// This transforms the SelectionDAG into a SelectionDAG 646 /// that only uses vector math operations supported by the target. This is 647 /// necessary as a separate step from Legalize because unrolling a vector 648 /// operation can introduce illegal types, which requires running 649 /// LegalizeTypes again. 650 /// 651 /// This returns true if it made any changes; in that case, LegalizeTypes 652 /// is called again before Legalize. 653 /// 654 /// Note that this is an involved process that may invalidate pointers into 655 /// the graph. 656 bool LegalizeVectors(); 657 658 /// This method deletes all unreachable nodes in the SelectionDAG. 659 void RemoveDeadNodes(); 660 661 /// Remove the specified node from the system. This node must 662 /// have no referrers. 663 void DeleteNode(SDNode *N); 664 665 /// Return an SDVTList that represents the list of values specified. 666 SDVTList getVTList(EVT VT); 667 SDVTList getVTList(EVT VT1, EVT VT2); 668 SDVTList getVTList(EVT VT1, EVT VT2, EVT VT3); 669 SDVTList getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4); 670 SDVTList getVTList(ArrayRef<EVT> VTs); 671 672 //===--------------------------------------------------------------------===// 673 // Node creation methods. 674 675 /// Create a ConstantSDNode wrapping a constant value. 676 /// If VT is a vector type, the constant is splatted into a BUILD_VECTOR. 677 /// 678 /// If only legal types can be produced, this does the necessary 679 /// transformations (e.g., if the vector element type is illegal). 680 /// @{ 681 SDValue getConstant(uint64_t Val, const SDLoc &DL, EVT VT, 682 bool isTarget = false, bool isOpaque = false); 683 SDValue getConstant(const APInt &Val, const SDLoc &DL, EVT VT, 684 bool isTarget = false, bool isOpaque = false); 685 686 SDValue getSignedConstant(int64_t Val, const SDLoc &DL, EVT VT, 687 bool isTarget = false, bool isOpaque = false); 688 689 SDValue getAllOnesConstant(const SDLoc &DL, EVT VT, bool IsTarget = false, 690 bool IsOpaque = false); 691 692 SDValue getConstant(const ConstantInt &Val, const SDLoc &DL, EVT VT, 693 bool isTarget = false, bool isOpaque = false); 694 SDValue getIntPtrConstant(uint64_t Val, const SDLoc &DL, 695 bool isTarget = false); 696 SDValue getShiftAmountConstant(uint64_t Val, EVT VT, const SDLoc &DL); 697 SDValue getShiftAmountConstant(const APInt &Val, EVT VT, const SDLoc &DL); 698 SDValue getVectorIdxConstant(uint64_t Val, const SDLoc &DL, 699 bool isTarget = false); 700 701 SDValue getTargetConstant(uint64_t Val, const SDLoc &DL, EVT VT, 702 bool isOpaque = false) { 703 return getConstant(Val, DL, VT, true, isOpaque); 704 } 705 SDValue getTargetConstant(const APInt &Val, const SDLoc &DL, EVT VT, 706 bool isOpaque = false) { 707 return getConstant(Val, DL, VT, true, isOpaque); 708 } 709 SDValue getTargetConstant(const ConstantInt &Val, const SDLoc &DL, EVT VT, 710 bool isOpaque = false) { 711 return getConstant(Val, DL, VT, true, isOpaque); 712 } 713 SDValue getSignedTargetConstant(int64_t Val, const SDLoc &DL, EVT VT, 714 bool isOpaque = false) { 715 return getSignedConstant(Val, DL, VT, true, isOpaque); 716 } 717 718 /// Create a true or false constant of type \p VT using the target's 719 /// BooleanContent for type \p OpVT. 720 SDValue getBoolConstant(bool V, const SDLoc &DL, EVT VT, EVT OpVT); 721 /// @} 722 723 /// Create a ConstantFPSDNode wrapping a constant value. 724 /// If VT is a vector type, the constant is splatted into a BUILD_VECTOR. 725 /// 726 /// If only legal types can be produced, this does the necessary 727 /// transformations (e.g., if the vector element type is illegal). 728 /// The forms that take a double should only be used for simple constants 729 /// that can be exactly represented in VT. No checks are made. 730 /// @{ 731 SDValue getConstantFP(double Val, const SDLoc &DL, EVT VT, 732 bool isTarget = false); 733 SDValue getConstantFP(const APFloat &Val, const SDLoc &DL, EVT VT, 734 bool isTarget = false); 735 SDValue getConstantFP(const ConstantFP &V, const SDLoc &DL, EVT VT, 736 bool isTarget = false); 737 SDValue getTargetConstantFP(double Val, const SDLoc &DL, EVT VT) { 738 return getConstantFP(Val, DL, VT, true); 739 } 740 SDValue getTargetConstantFP(const APFloat &Val, const SDLoc &DL, EVT VT) { 741 return getConstantFP(Val, DL, VT, true); 742 } 743 SDValue getTargetConstantFP(const ConstantFP &Val, const SDLoc &DL, EVT VT) { 744 return getConstantFP(Val, DL, VT, true); 745 } 746 /// @} 747 748 SDValue getGlobalAddress(const GlobalValue *GV, const SDLoc &DL, EVT VT, 749 int64_t offset = 0, bool isTargetGA = false, 750 unsigned TargetFlags = 0); 751 SDValue getTargetGlobalAddress(const GlobalValue *GV, const SDLoc &DL, EVT VT, 752 int64_t offset = 0, unsigned TargetFlags = 0) { 753 return getGlobalAddress(GV, DL, VT, offset, true, TargetFlags); 754 } 755 SDValue getFrameIndex(int FI, EVT VT, bool isTarget = false); 756 SDValue getTargetFrameIndex(int FI, EVT VT) { 757 return getFrameIndex(FI, VT, true); 758 } 759 SDValue getJumpTable(int JTI, EVT VT, bool isTarget = false, 760 unsigned TargetFlags = 0); 761 SDValue getTargetJumpTable(int JTI, EVT VT, unsigned TargetFlags = 0) { 762 return getJumpTable(JTI, VT, true, TargetFlags); 763 } 764 SDValue getJumpTableDebugInfo(int JTI, SDValue Chain, const SDLoc &DL); 765 SDValue getConstantPool(const Constant *C, EVT VT, 766 MaybeAlign Align = std::nullopt, int Offs = 0, 767 bool isT = false, unsigned TargetFlags = 0); 768 SDValue getTargetConstantPool(const Constant *C, EVT VT, 769 MaybeAlign Align = std::nullopt, int Offset = 0, 770 unsigned TargetFlags = 0) { 771 return getConstantPool(C, VT, Align, Offset, true, TargetFlags); 772 } 773 SDValue getConstantPool(MachineConstantPoolValue *C, EVT VT, 774 MaybeAlign Align = std::nullopt, int Offs = 0, 775 bool isT = false, unsigned TargetFlags = 0); 776 SDValue getTargetConstantPool(MachineConstantPoolValue *C, EVT VT, 777 MaybeAlign Align = std::nullopt, int Offset = 0, 778 unsigned TargetFlags = 0) { 779 return getConstantPool(C, VT, Align, Offset, true, TargetFlags); 780 } 781 // When generating a branch to a BB, we don't in general know enough 782 // to provide debug info for the BB at that time, so keep this one around. 783 SDValue getBasicBlock(MachineBasicBlock *MBB); 784 SDValue getExternalSymbol(const char *Sym, EVT VT); 785 SDValue getTargetExternalSymbol(const char *Sym, EVT VT, 786 unsigned TargetFlags = 0); 787 SDValue getMCSymbol(MCSymbol *Sym, EVT VT); 788 789 SDValue getValueType(EVT); 790 SDValue getRegister(Register Reg, EVT VT); 791 SDValue getRegisterMask(const uint32_t *RegMask); 792 SDValue getEHLabel(const SDLoc &dl, SDValue Root, MCSymbol *Label); 793 SDValue getLabelNode(unsigned Opcode, const SDLoc &dl, SDValue Root, 794 MCSymbol *Label); 795 SDValue getBlockAddress(const BlockAddress *BA, EVT VT, int64_t Offset = 0, 796 bool isTarget = false, unsigned TargetFlags = 0); 797 SDValue getTargetBlockAddress(const BlockAddress *BA, EVT VT, 798 int64_t Offset = 0, unsigned TargetFlags = 0) { 799 return getBlockAddress(BA, VT, Offset, true, TargetFlags); 800 } 801 802 SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, Register Reg, 803 SDValue N) { 804 return getNode(ISD::CopyToReg, dl, MVT::Other, Chain, 805 getRegister(Reg, N.getValueType()), N); 806 } 807 808 // This version of the getCopyToReg method takes an extra operand, which 809 // indicates that there is potentially an incoming glue value (if Glue is not 810 // null) and that there should be a glue result. 811 SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, Register Reg, SDValue N, 812 SDValue Glue) { 813 SDVTList VTs = getVTList(MVT::Other, MVT::Glue); 814 SDValue Ops[] = { Chain, getRegister(Reg, N.getValueType()), N, Glue }; 815 return getNode(ISD::CopyToReg, dl, VTs, 816 ArrayRef(Ops, Glue.getNode() ? 4 : 3)); 817 } 818 819 // Similar to last getCopyToReg() except parameter Reg is a SDValue 820 SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, SDValue Reg, SDValue N, 821 SDValue Glue) { 822 SDVTList VTs = getVTList(MVT::Other, MVT::Glue); 823 SDValue Ops[] = { Chain, Reg, N, Glue }; 824 return getNode(ISD::CopyToReg, dl, VTs, 825 ArrayRef(Ops, Glue.getNode() ? 4 : 3)); 826 } 827 828 SDValue getCopyFromReg(SDValue Chain, const SDLoc &dl, Register Reg, EVT VT) { 829 SDVTList VTs = getVTList(VT, MVT::Other); 830 SDValue Ops[] = { Chain, getRegister(Reg, VT) }; 831 return getNode(ISD::CopyFromReg, dl, VTs, Ops); 832 } 833 834 // This version of the getCopyFromReg method takes an extra operand, which 835 // indicates that there is potentially an incoming glue value (if Glue is not 836 // null) and that there should be a glue result. 837 SDValue getCopyFromReg(SDValue Chain, const SDLoc &dl, Register Reg, EVT VT, 838 SDValue Glue) { 839 SDVTList VTs = getVTList(VT, MVT::Other, MVT::Glue); 840 SDValue Ops[] = { Chain, getRegister(Reg, VT), Glue }; 841 return getNode(ISD::CopyFromReg, dl, VTs, 842 ArrayRef(Ops, Glue.getNode() ? 3 : 2)); 843 } 844 845 SDValue getCondCode(ISD::CondCode Cond); 846 847 /// Return an ISD::VECTOR_SHUFFLE node. The number of elements in VT, 848 /// which must be a vector type, must match the number of mask elements 849 /// NumElts. An integer mask element equal to -1 is treated as undefined. 850 SDValue getVectorShuffle(EVT VT, const SDLoc &dl, SDValue N1, SDValue N2, 851 ArrayRef<int> Mask); 852 853 /// Return an ISD::BUILD_VECTOR node. The number of elements in VT, 854 /// which must be a vector type, must match the number of operands in Ops. 855 /// The operands must have the same type as (or, for integers, a type wider 856 /// than) VT's element type. 857 SDValue getBuildVector(EVT VT, const SDLoc &DL, ArrayRef<SDValue> Ops) { 858 // VerifySDNode (via InsertNode) checks BUILD_VECTOR later. 859 return getNode(ISD::BUILD_VECTOR, DL, VT, Ops); 860 } 861 862 /// Return an ISD::BUILD_VECTOR node. The number of elements in VT, 863 /// which must be a vector type, must match the number of operands in Ops. 864 /// The operands must have the same type as (or, for integers, a type wider 865 /// than) VT's element type. 866 SDValue getBuildVector(EVT VT, const SDLoc &DL, ArrayRef<SDUse> Ops) { 867 // VerifySDNode (via InsertNode) checks BUILD_VECTOR later. 868 return getNode(ISD::BUILD_VECTOR, DL, VT, Ops); 869 } 870 871 /// Return a splat ISD::BUILD_VECTOR node, consisting of Op splatted to all 872 /// elements. VT must be a vector type. Op's type must be the same as (or, 873 /// for integers, a type wider than) VT's element type. 874 SDValue getSplatBuildVector(EVT VT, const SDLoc &DL, SDValue Op) { 875 // VerifySDNode (via InsertNode) checks BUILD_VECTOR later. 876 if (Op.getOpcode() == ISD::UNDEF) { 877 assert((VT.getVectorElementType() == Op.getValueType() || 878 (VT.isInteger() && 879 VT.getVectorElementType().bitsLE(Op.getValueType()))) && 880 "A splatted value must have a width equal or (for integers) " 881 "greater than the vector element type!"); 882 return getNode(ISD::UNDEF, SDLoc(), VT); 883 } 884 885 SmallVector<SDValue, 16> Ops(VT.getVectorNumElements(), Op); 886 return getNode(ISD::BUILD_VECTOR, DL, VT, Ops); 887 } 888 889 // Return a splat ISD::SPLAT_VECTOR node, consisting of Op splatted to all 890 // elements. 891 SDValue getSplatVector(EVT VT, const SDLoc &DL, SDValue Op) { 892 if (Op.getOpcode() == ISD::UNDEF) { 893 assert((VT.getVectorElementType() == Op.getValueType() || 894 (VT.isInteger() && 895 VT.getVectorElementType().bitsLE(Op.getValueType()))) && 896 "A splatted value must have a width equal or (for integers) " 897 "greater than the vector element type!"); 898 return getNode(ISD::UNDEF, SDLoc(), VT); 899 } 900 return getNode(ISD::SPLAT_VECTOR, DL, VT, Op); 901 } 902 903 /// Returns a node representing a splat of one value into all lanes 904 /// of the provided vector type. This is a utility which returns 905 /// either a BUILD_VECTOR or SPLAT_VECTOR depending on the 906 /// scalability of the desired vector type. 907 SDValue getSplat(EVT VT, const SDLoc &DL, SDValue Op) { 908 assert(VT.isVector() && "Can't splat to non-vector type"); 909 return VT.isScalableVector() ? 910 getSplatVector(VT, DL, Op) : getSplatBuildVector(VT, DL, Op); 911 } 912 913 /// Returns a vector of type ResVT whose elements contain the linear sequence 914 /// <0, Step, Step * 2, Step * 3, ...> 915 SDValue getStepVector(const SDLoc &DL, EVT ResVT, const APInt &StepVal); 916 917 /// Returns a vector of type ResVT whose elements contain the linear sequence 918 /// <0, 1, 2, 3, ...> 919 SDValue getStepVector(const SDLoc &DL, EVT ResVT); 920 921 /// Returns an ISD::VECTOR_SHUFFLE node semantically equivalent to 922 /// the shuffle node in input but with swapped operands. 923 /// 924 /// Example: shuffle A, B, <0,5,2,7> -> shuffle B, A, <4,1,6,3> 925 SDValue getCommutedVectorShuffle(const ShuffleVectorSDNode &SV); 926 927 /// Convert Op, which must be of float type, to the 928 /// float type VT, by either extending or rounding (by truncation). 929 SDValue getFPExtendOrRound(SDValue Op, const SDLoc &DL, EVT VT); 930 931 /// Convert Op, which must be a STRICT operation of float type, to the 932 /// float type VT, by either extending or rounding (by truncation). 933 std::pair<SDValue, SDValue> 934 getStrictFPExtendOrRound(SDValue Op, SDValue Chain, const SDLoc &DL, EVT VT); 935 936 /// Convert *_EXTEND_VECTOR_INREG to *_EXTEND opcode. 937 static unsigned getOpcode_EXTEND(unsigned Opcode) { 938 switch (Opcode) { 939 case ISD::ANY_EXTEND: 940 case ISD::ANY_EXTEND_VECTOR_INREG: 941 return ISD::ANY_EXTEND; 942 case ISD::ZERO_EXTEND: 943 case ISD::ZERO_EXTEND_VECTOR_INREG: 944 return ISD::ZERO_EXTEND; 945 case ISD::SIGN_EXTEND: 946 case ISD::SIGN_EXTEND_VECTOR_INREG: 947 return ISD::SIGN_EXTEND; 948 } 949 llvm_unreachable("Unknown opcode"); 950 } 951 952 /// Convert *_EXTEND to *_EXTEND_VECTOR_INREG opcode. 953 static unsigned getOpcode_EXTEND_VECTOR_INREG(unsigned Opcode) { 954 switch (Opcode) { 955 case ISD::ANY_EXTEND: 956 case ISD::ANY_EXTEND_VECTOR_INREG: 957 return ISD::ANY_EXTEND_VECTOR_INREG; 958 case ISD::ZERO_EXTEND: 959 case ISD::ZERO_EXTEND_VECTOR_INREG: 960 return ISD::ZERO_EXTEND_VECTOR_INREG; 961 case ISD::SIGN_EXTEND: 962 case ISD::SIGN_EXTEND_VECTOR_INREG: 963 return ISD::SIGN_EXTEND_VECTOR_INREG; 964 } 965 llvm_unreachable("Unknown opcode"); 966 } 967 968 /// Convert Op, which must be of integer type, to the 969 /// integer type VT, by either any-extending or truncating it. 970 SDValue getAnyExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT); 971 972 /// Convert Op, which must be of integer type, to the 973 /// integer type VT, by either sign-extending or truncating it. 974 SDValue getSExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT); 975 976 /// Convert Op, which must be of integer type, to the 977 /// integer type VT, by either zero-extending or truncating it. 978 SDValue getZExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT); 979 980 /// Convert Op, which must be of integer type, to the 981 /// integer type VT, by either any/sign/zero-extending (depending on IsAny / 982 /// IsSigned) or truncating it. 983 SDValue getExtOrTrunc(SDValue Op, const SDLoc &DL, 984 EVT VT, unsigned Opcode) { 985 switch(Opcode) { 986 case ISD::ANY_EXTEND: 987 return getAnyExtOrTrunc(Op, DL, VT); 988 case ISD::ZERO_EXTEND: 989 return getZExtOrTrunc(Op, DL, VT); 990 case ISD::SIGN_EXTEND: 991 return getSExtOrTrunc(Op, DL, VT); 992 } 993 llvm_unreachable("Unsupported opcode"); 994 } 995 996 /// Convert Op, which must be of integer type, to the 997 /// integer type VT, by either sign/zero-extending (depending on IsSigned) or 998 /// truncating it. 999 SDValue getExtOrTrunc(bool IsSigned, SDValue Op, const SDLoc &DL, EVT VT) { 1000 return IsSigned ? getSExtOrTrunc(Op, DL, VT) : getZExtOrTrunc(Op, DL, VT); 1001 } 1002 1003 /// Convert Op, which must be of integer type, to the 1004 /// integer type VT, by first bitcasting (from potential vector) to 1005 /// corresponding scalar type then either any-extending or truncating it. 1006 SDValue getBitcastedAnyExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT); 1007 1008 /// Convert Op, which must be of integer type, to the 1009 /// integer type VT, by first bitcasting (from potential vector) to 1010 /// corresponding scalar type then either sign-extending or truncating it. 1011 SDValue getBitcastedSExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT); 1012 1013 /// Convert Op, which must be of integer type, to the 1014 /// integer type VT, by first bitcasting (from potential vector) to 1015 /// corresponding scalar type then either zero-extending or truncating it. 1016 SDValue getBitcastedZExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT); 1017 1018 /// Return the expression required to zero extend the Op 1019 /// value assuming it was the smaller SrcTy value. 1020 SDValue getZeroExtendInReg(SDValue Op, const SDLoc &DL, EVT VT); 1021 1022 /// Return the expression required to zero extend the Op 1023 /// value assuming it was the smaller SrcTy value. 1024 SDValue getVPZeroExtendInReg(SDValue Op, SDValue Mask, SDValue EVL, 1025 const SDLoc &DL, EVT VT); 1026 1027 /// Convert Op, which must be of integer type, to the integer type VT, by 1028 /// either truncating it or performing either zero or sign extension as 1029 /// appropriate extension for the pointer's semantics. 1030 SDValue getPtrExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT); 1031 1032 /// Return the expression required to extend the Op as a pointer value 1033 /// assuming it was the smaller SrcTy value. This may be either a zero extend 1034 /// or a sign extend. 1035 SDValue getPtrExtendInReg(SDValue Op, const SDLoc &DL, EVT VT); 1036 1037 /// Convert Op, which must be of integer type, to the integer type VT, 1038 /// by using an extension appropriate for the target's 1039 /// BooleanContent for type OpVT or truncating it. 1040 SDValue getBoolExtOrTrunc(SDValue Op, const SDLoc &SL, EVT VT, EVT OpVT); 1041 1042 /// Create negative operation as (SUB 0, Val). 1043 SDValue getNegative(SDValue Val, const SDLoc &DL, EVT VT); 1044 1045 /// Create a bitwise NOT operation as (XOR Val, -1). 1046 SDValue getNOT(const SDLoc &DL, SDValue Val, EVT VT); 1047 1048 /// Create a logical NOT operation as (XOR Val, BooleanOne). 1049 SDValue getLogicalNOT(const SDLoc &DL, SDValue Val, EVT VT); 1050 1051 /// Create a vector-predicated logical NOT operation as (VP_XOR Val, 1052 /// BooleanOne, Mask, EVL). 1053 SDValue getVPLogicalNOT(const SDLoc &DL, SDValue Val, SDValue Mask, 1054 SDValue EVL, EVT VT); 1055 1056 /// Convert a vector-predicated Op, which must be an integer vector, to the 1057 /// vector-type VT, by performing either vector-predicated zext or truncating 1058 /// it. The Op will be returned as-is if Op and VT are vectors containing 1059 /// integer with same width. 1060 SDValue getVPZExtOrTrunc(const SDLoc &DL, EVT VT, SDValue Op, SDValue Mask, 1061 SDValue EVL); 1062 1063 /// Convert a vector-predicated Op, which must be of integer type, to the 1064 /// vector-type integer type VT, by either truncating it or performing either 1065 /// vector-predicated zero or sign extension as appropriate extension for the 1066 /// pointer's semantics. This function just redirects to getVPZExtOrTrunc 1067 /// right now. 1068 SDValue getVPPtrExtOrTrunc(const SDLoc &DL, EVT VT, SDValue Op, SDValue Mask, 1069 SDValue EVL); 1070 1071 /// Returns sum of the base pointer and offset. 1072 /// Unlike getObjectPtrOffset this does not set NoUnsignedWrap by default. 1073 SDValue getMemBasePlusOffset(SDValue Base, TypeSize Offset, const SDLoc &DL, 1074 const SDNodeFlags Flags = SDNodeFlags()); 1075 SDValue getMemBasePlusOffset(SDValue Base, SDValue Offset, const SDLoc &DL, 1076 const SDNodeFlags Flags = SDNodeFlags()); 1077 1078 /// Create an add instruction with appropriate flags when used for 1079 /// addressing some offset of an object. i.e. if a load is split into multiple 1080 /// components, create an add nuw from the base pointer to the offset. 1081 SDValue getObjectPtrOffset(const SDLoc &SL, SDValue Ptr, TypeSize Offset) { 1082 return getMemBasePlusOffset(Ptr, Offset, SL, SDNodeFlags::NoUnsignedWrap); 1083 } 1084 1085 SDValue getObjectPtrOffset(const SDLoc &SL, SDValue Ptr, SDValue Offset) { 1086 // The object itself can't wrap around the address space, so it shouldn't be 1087 // possible for the adds of the offsets to the split parts to overflow. 1088 return getMemBasePlusOffset(Ptr, Offset, SL, SDNodeFlags::NoUnsignedWrap); 1089 } 1090 1091 /// Return a new CALLSEQ_START node, that starts new call frame, in which 1092 /// InSize bytes are set up inside CALLSEQ_START..CALLSEQ_END sequence and 1093 /// OutSize specifies part of the frame set up prior to the sequence. 1094 SDValue getCALLSEQ_START(SDValue Chain, uint64_t InSize, uint64_t OutSize, 1095 const SDLoc &DL) { 1096 SDVTList VTs = getVTList(MVT::Other, MVT::Glue); 1097 SDValue Ops[] = { Chain, 1098 getIntPtrConstant(InSize, DL, true), 1099 getIntPtrConstant(OutSize, DL, true) }; 1100 return getNode(ISD::CALLSEQ_START, DL, VTs, Ops); 1101 } 1102 1103 /// Return a new CALLSEQ_END node, which always must have a 1104 /// glue result (to ensure it's not CSE'd). 1105 /// CALLSEQ_END does not have a useful SDLoc. 1106 SDValue getCALLSEQ_END(SDValue Chain, SDValue Op1, SDValue Op2, 1107 SDValue InGlue, const SDLoc &DL) { 1108 SDVTList NodeTys = getVTList(MVT::Other, MVT::Glue); 1109 SmallVector<SDValue, 4> Ops; 1110 Ops.push_back(Chain); 1111 Ops.push_back(Op1); 1112 Ops.push_back(Op2); 1113 if (InGlue.getNode()) 1114 Ops.push_back(InGlue); 1115 return getNode(ISD::CALLSEQ_END, DL, NodeTys, Ops); 1116 } 1117 1118 SDValue getCALLSEQ_END(SDValue Chain, uint64_t Size1, uint64_t Size2, 1119 SDValue Glue, const SDLoc &DL) { 1120 return getCALLSEQ_END( 1121 Chain, getIntPtrConstant(Size1, DL, /*isTarget=*/true), 1122 getIntPtrConstant(Size2, DL, /*isTarget=*/true), Glue, DL); 1123 } 1124 1125 /// Return true if the result of this operation is always undefined. 1126 bool isUndef(unsigned Opcode, ArrayRef<SDValue> Ops); 1127 1128 /// Return an UNDEF node. UNDEF does not have a useful SDLoc. 1129 SDValue getUNDEF(EVT VT) { 1130 return getNode(ISD::UNDEF, SDLoc(), VT); 1131 } 1132 1133 /// Return a node that represents the runtime scaling 'MulImm * RuntimeVL'. 1134 SDValue getVScale(const SDLoc &DL, EVT VT, APInt MulImm, 1135 bool ConstantFold = true); 1136 1137 SDValue getElementCount(const SDLoc &DL, EVT VT, ElementCount EC, 1138 bool ConstantFold = true); 1139 1140 /// Return a GLOBAL_OFFSET_TABLE node. This does not have a useful SDLoc. 1141 SDValue getGLOBAL_OFFSET_TABLE(EVT VT) { 1142 return getNode(ISD::GLOBAL_OFFSET_TABLE, SDLoc(), VT); 1143 } 1144 1145 /// Gets or creates the specified node. 1146 /// 1147 SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, 1148 ArrayRef<SDUse> Ops); 1149 SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, 1150 ArrayRef<SDValue> Ops, const SDNodeFlags Flags); 1151 SDValue getNode(unsigned Opcode, const SDLoc &DL, ArrayRef<EVT> ResultTys, 1152 ArrayRef<SDValue> Ops); 1153 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, 1154 ArrayRef<SDValue> Ops, const SDNodeFlags Flags); 1155 1156 // Use flags from current flag inserter. 1157 SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, 1158 ArrayRef<SDValue> Ops); 1159 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, 1160 ArrayRef<SDValue> Ops); 1161 SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue Operand); 1162 SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, 1163 SDValue N2); 1164 SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, 1165 SDValue N2, SDValue N3); 1166 1167 // Specialize based on number of operands. 1168 SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT); 1169 SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue Operand, 1170 const SDNodeFlags Flags); 1171 SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, 1172 SDValue N2, const SDNodeFlags Flags); 1173 SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, 1174 SDValue N2, SDValue N3, const SDNodeFlags Flags); 1175 SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, 1176 SDValue N2, SDValue N3, SDValue N4); 1177 SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, 1178 SDValue N2, SDValue N3, SDValue N4, const SDNodeFlags Flags); 1179 SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, 1180 SDValue N2, SDValue N3, SDValue N4, SDValue N5); 1181 SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, 1182 SDValue N2, SDValue N3, SDValue N4, SDValue N5, 1183 const SDNodeFlags Flags); 1184 1185 // Specialize again based on number of operands for nodes with a VTList 1186 // rather than a single VT. 1187 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList); 1188 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N); 1189 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1, 1190 SDValue N2); 1191 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1, 1192 SDValue N2, SDValue N3); 1193 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1, 1194 SDValue N2, SDValue N3, SDValue N4); 1195 SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1, 1196 SDValue N2, SDValue N3, SDValue N4, SDValue N5); 1197 1198 /// Compute a TokenFactor to force all the incoming stack arguments to be 1199 /// loaded from the stack. This is used in tail call lowering to protect 1200 /// stack arguments from being clobbered. 1201 SDValue getStackArgumentTokenFactor(SDValue Chain); 1202 1203 /* \p CI if not null is the memset call being lowered. 1204 * \p OverrideTailCall is an optional parameter that can be used to override 1205 * the tail call optimization decision. */ 1206 SDValue getMemcpy(SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Src, 1207 SDValue Size, Align Alignment, bool isVol, 1208 bool AlwaysInline, const CallInst *CI, 1209 std::optional<bool> OverrideTailCall, 1210 MachinePointerInfo DstPtrInfo, 1211 MachinePointerInfo SrcPtrInfo, 1212 const AAMDNodes &AAInfo = AAMDNodes(), 1213 BatchAAResults *BatchAA = nullptr); 1214 1215 /* \p CI if not null is the memset call being lowered. 1216 * \p OverrideTailCall is an optional parameter that can be used to override 1217 * the tail call optimization decision. */ 1218 SDValue getMemmove(SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Src, 1219 SDValue Size, Align Alignment, bool isVol, 1220 const CallInst *CI, std::optional<bool> OverrideTailCall, 1221 MachinePointerInfo DstPtrInfo, 1222 MachinePointerInfo SrcPtrInfo, 1223 const AAMDNodes &AAInfo = AAMDNodes(), 1224 BatchAAResults *BatchAA = nullptr); 1225 1226 SDValue getMemset(SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Src, 1227 SDValue Size, Align Alignment, bool isVol, 1228 bool AlwaysInline, const CallInst *CI, 1229 MachinePointerInfo DstPtrInfo, 1230 const AAMDNodes &AAInfo = AAMDNodes()); 1231 1232 SDValue getAtomicMemcpy(SDValue Chain, const SDLoc &dl, SDValue Dst, 1233 SDValue Src, SDValue Size, Type *SizeTy, 1234 unsigned ElemSz, bool isTailCall, 1235 MachinePointerInfo DstPtrInfo, 1236 MachinePointerInfo SrcPtrInfo); 1237 1238 SDValue getAtomicMemmove(SDValue Chain, const SDLoc &dl, SDValue Dst, 1239 SDValue Src, SDValue Size, Type *SizeTy, 1240 unsigned ElemSz, bool isTailCall, 1241 MachinePointerInfo DstPtrInfo, 1242 MachinePointerInfo SrcPtrInfo); 1243 1244 SDValue getAtomicMemset(SDValue Chain, const SDLoc &dl, SDValue Dst, 1245 SDValue Value, SDValue Size, Type *SizeTy, 1246 unsigned ElemSz, bool isTailCall, 1247 MachinePointerInfo DstPtrInfo); 1248 1249 /// Helper function to make it easier to build SetCC's if you just have an 1250 /// ISD::CondCode instead of an SDValue. 1251 SDValue getSetCC(const SDLoc &DL, EVT VT, SDValue LHS, SDValue RHS, 1252 ISD::CondCode Cond, SDValue Chain = SDValue(), 1253 bool IsSignaling = false) { 1254 assert(LHS.getValueType().isVector() == RHS.getValueType().isVector() && 1255 "Vector/scalar operand type mismatch for setcc"); 1256 assert(LHS.getValueType().isVector() == VT.isVector() && 1257 "Vector/scalar result type mismatch for setcc"); 1258 assert(Cond != ISD::SETCC_INVALID && 1259 "Cannot create a setCC of an invalid node."); 1260 if (Chain) 1261 return getNode(IsSignaling ? ISD::STRICT_FSETCCS : ISD::STRICT_FSETCC, DL, 1262 {VT, MVT::Other}, {Chain, LHS, RHS, getCondCode(Cond)}); 1263 return getNode(ISD::SETCC, DL, VT, LHS, RHS, getCondCode(Cond)); 1264 } 1265 1266 /// Helper function to make it easier to build VP_SETCCs if you just have an 1267 /// ISD::CondCode instead of an SDValue. 1268 SDValue getSetCCVP(const SDLoc &DL, EVT VT, SDValue LHS, SDValue RHS, 1269 ISD::CondCode Cond, SDValue Mask, SDValue EVL) { 1270 assert(LHS.getValueType().isVector() && RHS.getValueType().isVector() && 1271 "Cannot compare scalars"); 1272 assert(Cond != ISD::SETCC_INVALID && 1273 "Cannot create a setCC of an invalid node."); 1274 return getNode(ISD::VP_SETCC, DL, VT, LHS, RHS, getCondCode(Cond), Mask, 1275 EVL); 1276 } 1277 1278 /// Helper function to make it easier to build Select's if you just have 1279 /// operands and don't want to check for vector. 1280 SDValue getSelect(const SDLoc &DL, EVT VT, SDValue Cond, SDValue LHS, 1281 SDValue RHS, SDNodeFlags Flags = SDNodeFlags()) { 1282 assert(LHS.getValueType() == VT && RHS.getValueType() == VT && 1283 "Cannot use select on differing types"); 1284 auto Opcode = Cond.getValueType().isVector() ? ISD::VSELECT : ISD::SELECT; 1285 return getNode(Opcode, DL, VT, Cond, LHS, RHS, Flags); 1286 } 1287 1288 /// Helper function to make it easier to build SelectCC's if you just have an 1289 /// ISD::CondCode instead of an SDValue. 1290 SDValue getSelectCC(const SDLoc &DL, SDValue LHS, SDValue RHS, SDValue True, 1291 SDValue False, ISD::CondCode Cond) { 1292 return getNode(ISD::SELECT_CC, DL, True.getValueType(), LHS, RHS, True, 1293 False, getCondCode(Cond)); 1294 } 1295 1296 /// Try to simplify a select/vselect into 1 of its operands or a constant. 1297 SDValue simplifySelect(SDValue Cond, SDValue TVal, SDValue FVal); 1298 1299 /// Try to simplify a shift into 1 of its operands or a constant. 1300 SDValue simplifyShift(SDValue X, SDValue Y); 1301 1302 /// Try to simplify a floating-point binary operation into 1 of its operands 1303 /// or a constant. 1304 SDValue simplifyFPBinop(unsigned Opcode, SDValue X, SDValue Y, 1305 SDNodeFlags Flags); 1306 1307 /// VAArg produces a result and token chain, and takes a pointer 1308 /// and a source value as input. 1309 SDValue getVAArg(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, 1310 SDValue SV, unsigned Align); 1311 1312 /// Gets a node for an atomic cmpxchg op. There are two 1313 /// valid Opcodes. ISD::ATOMIC_CMO_SWAP produces the value loaded and a 1314 /// chain result. ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS produces the value loaded, 1315 /// a success flag (initially i1), and a chain. 1316 SDValue getAtomicCmpSwap(unsigned Opcode, const SDLoc &dl, EVT MemVT, 1317 SDVTList VTs, SDValue Chain, SDValue Ptr, 1318 SDValue Cmp, SDValue Swp, MachineMemOperand *MMO); 1319 1320 /// Gets a node for an atomic op, produces result (if relevant) 1321 /// and chain and takes 2 operands. 1322 SDValue getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT, SDValue Chain, 1323 SDValue Ptr, SDValue Val, MachineMemOperand *MMO); 1324 1325 /// Gets a node for an atomic op, produces result and chain and 1326 /// takes 1 operand. 1327 SDValue getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT, EVT VT, 1328 SDValue Chain, SDValue Ptr, MachineMemOperand *MMO); 1329 1330 /// Gets a node for an atomic op, produces result and chain and takes N 1331 /// operands. 1332 SDValue getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT, 1333 SDVTList VTList, ArrayRef<SDValue> Ops, 1334 MachineMemOperand *MMO); 1335 1336 /// Creates a MemIntrinsicNode that may produce a 1337 /// result and takes a list of operands. Opcode may be INTRINSIC_VOID, 1338 /// INTRINSIC_W_CHAIN, or a target-specific memory-referencing opcode 1339 // (see `SelectionDAGTargetInfo::isTargetMemoryOpcode`). 1340 SDValue getMemIntrinsicNode( 1341 unsigned Opcode, const SDLoc &dl, SDVTList VTList, ArrayRef<SDValue> Ops, 1342 EVT MemVT, MachinePointerInfo PtrInfo, Align Alignment, 1343 MachineMemOperand::Flags Flags = MachineMemOperand::MOLoad | 1344 MachineMemOperand::MOStore, 1345 LocationSize Size = 0, const AAMDNodes &AAInfo = AAMDNodes()); 1346 1347 inline SDValue getMemIntrinsicNode( 1348 unsigned Opcode, const SDLoc &dl, SDVTList VTList, ArrayRef<SDValue> Ops, 1349 EVT MemVT, MachinePointerInfo PtrInfo, 1350 MaybeAlign Alignment = std::nullopt, 1351 MachineMemOperand::Flags Flags = MachineMemOperand::MOLoad | 1352 MachineMemOperand::MOStore, 1353 LocationSize Size = 0, const AAMDNodes &AAInfo = AAMDNodes()) { 1354 // Ensure that codegen never sees alignment 0 1355 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, MemVT, PtrInfo, 1356 Alignment.value_or(getEVTAlign(MemVT)), Flags, 1357 Size, AAInfo); 1358 } 1359 1360 SDValue getMemIntrinsicNode(unsigned Opcode, const SDLoc &dl, SDVTList VTList, 1361 ArrayRef<SDValue> Ops, EVT MemVT, 1362 MachineMemOperand *MMO); 1363 1364 /// Creates a LifetimeSDNode that starts (`IsStart==true`) or ends 1365 /// (`IsStart==false`) the lifetime of the portion of `FrameIndex` between 1366 /// offsets `Offset` and `Offset + Size`. 1367 SDValue getLifetimeNode(bool IsStart, const SDLoc &dl, SDValue Chain, 1368 int FrameIndex, int64_t Size, int64_t Offset = -1); 1369 1370 /// Creates a PseudoProbeSDNode with function GUID `Guid` and 1371 /// the index of the block `Index` it is probing, as well as the attributes 1372 /// `attr` of the probe. 1373 SDValue getPseudoProbeNode(const SDLoc &Dl, SDValue Chain, uint64_t Guid, 1374 uint64_t Index, uint32_t Attr); 1375 1376 /// Create a MERGE_VALUES node from the given operands. 1377 SDValue getMergeValues(ArrayRef<SDValue> Ops, const SDLoc &dl); 1378 1379 /// Loads are not normal binary operators: their result type is not 1380 /// determined by their operands, and they produce a value AND a token chain. 1381 /// 1382 /// This function will set the MOLoad flag on MMOFlags, but you can set it if 1383 /// you want. The MOStore flag must not be set. 1384 SDValue getLoad(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, 1385 MachinePointerInfo PtrInfo, 1386 MaybeAlign Alignment = MaybeAlign(), 1387 MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone, 1388 const AAMDNodes &AAInfo = AAMDNodes(), 1389 const MDNode *Ranges = nullptr); 1390 SDValue getLoad(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, 1391 MachineMemOperand *MMO); 1392 SDValue 1393 getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT, SDValue Chain, 1394 SDValue Ptr, MachinePointerInfo PtrInfo, EVT MemVT, 1395 MaybeAlign Alignment = MaybeAlign(), 1396 MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone, 1397 const AAMDNodes &AAInfo = AAMDNodes()); 1398 SDValue getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT, 1399 SDValue Chain, SDValue Ptr, EVT MemVT, 1400 MachineMemOperand *MMO); 1401 SDValue getIndexedLoad(SDValue OrigLoad, const SDLoc &dl, SDValue Base, 1402 SDValue Offset, ISD::MemIndexedMode AM); 1403 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, 1404 const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue Offset, 1405 MachinePointerInfo PtrInfo, EVT MemVT, Align Alignment, 1406 MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone, 1407 const AAMDNodes &AAInfo = AAMDNodes(), 1408 const MDNode *Ranges = nullptr); 1409 inline SDValue getLoad( 1410 ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, const SDLoc &dl, 1411 SDValue Chain, SDValue Ptr, SDValue Offset, MachinePointerInfo PtrInfo, 1412 EVT MemVT, MaybeAlign Alignment = MaybeAlign(), 1413 MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone, 1414 const AAMDNodes &AAInfo = AAMDNodes(), const MDNode *Ranges = nullptr) { 1415 // Ensures that codegen never sees a None Alignment. 1416 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, PtrInfo, MemVT, 1417 Alignment.value_or(getEVTAlign(MemVT)), MMOFlags, AAInfo, 1418 Ranges); 1419 } 1420 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, 1421 const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue Offset, 1422 EVT MemVT, MachineMemOperand *MMO); 1423 1424 /// Helper function to build ISD::STORE nodes. 1425 /// 1426 /// This function will set the MOStore flag on MMOFlags, but you can set it if 1427 /// you want. The MOLoad and MOInvariant flags must not be set. 1428 1429 SDValue 1430 getStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, 1431 MachinePointerInfo PtrInfo, Align Alignment, 1432 MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone, 1433 const AAMDNodes &AAInfo = AAMDNodes()); 1434 inline SDValue 1435 getStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, 1436 MachinePointerInfo PtrInfo, MaybeAlign Alignment = MaybeAlign(), 1437 MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone, 1438 const AAMDNodes &AAInfo = AAMDNodes()) { 1439 return getStore(Chain, dl, Val, Ptr, PtrInfo, 1440 Alignment.value_or(getEVTAlign(Val.getValueType())), 1441 MMOFlags, AAInfo); 1442 } 1443 SDValue getStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, 1444 MachineMemOperand *MMO); 1445 SDValue 1446 getTruncStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, 1447 MachinePointerInfo PtrInfo, EVT SVT, Align Alignment, 1448 MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone, 1449 const AAMDNodes &AAInfo = AAMDNodes()); 1450 inline SDValue 1451 getTruncStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, 1452 MachinePointerInfo PtrInfo, EVT SVT, 1453 MaybeAlign Alignment = MaybeAlign(), 1454 MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone, 1455 const AAMDNodes &AAInfo = AAMDNodes()) { 1456 return getTruncStore(Chain, dl, Val, Ptr, PtrInfo, SVT, 1457 Alignment.value_or(getEVTAlign(SVT)), MMOFlags, 1458 AAInfo); 1459 } 1460 SDValue getTruncStore(SDValue Chain, const SDLoc &dl, SDValue Val, 1461 SDValue Ptr, EVT SVT, MachineMemOperand *MMO); 1462 SDValue getIndexedStore(SDValue OrigStore, const SDLoc &dl, SDValue Base, 1463 SDValue Offset, ISD::MemIndexedMode AM); 1464 1465 SDValue getLoadVP(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, 1466 const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue Offset, 1467 SDValue Mask, SDValue EVL, MachinePointerInfo PtrInfo, 1468 EVT MemVT, Align Alignment, 1469 MachineMemOperand::Flags MMOFlags, const AAMDNodes &AAInfo, 1470 const MDNode *Ranges = nullptr, bool IsExpanding = false); 1471 inline SDValue 1472 getLoadVP(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, 1473 const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue Offset, 1474 SDValue Mask, SDValue EVL, MachinePointerInfo PtrInfo, EVT MemVT, 1475 MaybeAlign Alignment = MaybeAlign(), 1476 MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone, 1477 const AAMDNodes &AAInfo = AAMDNodes(), 1478 const MDNode *Ranges = nullptr, bool IsExpanding = false) { 1479 // Ensures that codegen never sees a None Alignment. 1480 return getLoadVP(AM, ExtType, VT, dl, Chain, Ptr, Offset, Mask, EVL, 1481 PtrInfo, MemVT, Alignment.value_or(getEVTAlign(MemVT)), 1482 MMOFlags, AAInfo, Ranges, IsExpanding); 1483 } 1484 SDValue getLoadVP(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, 1485 const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue Offset, 1486 SDValue Mask, SDValue EVL, EVT MemVT, 1487 MachineMemOperand *MMO, bool IsExpanding = false); 1488 SDValue getLoadVP(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, 1489 SDValue Mask, SDValue EVL, MachinePointerInfo PtrInfo, 1490 MaybeAlign Alignment, MachineMemOperand::Flags MMOFlags, 1491 const AAMDNodes &AAInfo, const MDNode *Ranges = nullptr, 1492 bool IsExpanding = false); 1493 SDValue getLoadVP(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, 1494 SDValue Mask, SDValue EVL, MachineMemOperand *MMO, 1495 bool IsExpanding = false); 1496 SDValue getExtLoadVP(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT, 1497 SDValue Chain, SDValue Ptr, SDValue Mask, SDValue EVL, 1498 MachinePointerInfo PtrInfo, EVT MemVT, 1499 MaybeAlign Alignment, MachineMemOperand::Flags MMOFlags, 1500 const AAMDNodes &AAInfo, bool IsExpanding = false); 1501 SDValue getExtLoadVP(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT, 1502 SDValue Chain, SDValue Ptr, SDValue Mask, SDValue EVL, 1503 EVT MemVT, MachineMemOperand *MMO, 1504 bool IsExpanding = false); 1505 SDValue getIndexedLoadVP(SDValue OrigLoad, const SDLoc &dl, SDValue Base, 1506 SDValue Offset, ISD::MemIndexedMode AM); 1507 SDValue getStoreVP(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, 1508 SDValue Offset, SDValue Mask, SDValue EVL, EVT MemVT, 1509 MachineMemOperand *MMO, ISD::MemIndexedMode AM, 1510 bool IsTruncating = false, bool IsCompressing = false); 1511 SDValue getTruncStoreVP(SDValue Chain, const SDLoc &dl, SDValue Val, 1512 SDValue Ptr, SDValue Mask, SDValue EVL, 1513 MachinePointerInfo PtrInfo, EVT SVT, Align Alignment, 1514 MachineMemOperand::Flags MMOFlags, 1515 const AAMDNodes &AAInfo, bool IsCompressing = false); 1516 SDValue getTruncStoreVP(SDValue Chain, const SDLoc &dl, SDValue Val, 1517 SDValue Ptr, SDValue Mask, SDValue EVL, EVT SVT, 1518 MachineMemOperand *MMO, bool IsCompressing = false); 1519 SDValue getIndexedStoreVP(SDValue OrigStore, const SDLoc &dl, SDValue Base, 1520 SDValue Offset, ISD::MemIndexedMode AM); 1521 1522 SDValue getStridedLoadVP(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 1523 EVT VT, const SDLoc &DL, SDValue Chain, SDValue Ptr, 1524 SDValue Offset, SDValue Stride, SDValue Mask, 1525 SDValue EVL, EVT MemVT, MachineMemOperand *MMO, 1526 bool IsExpanding = false); 1527 SDValue getStridedLoadVP(EVT VT, const SDLoc &DL, SDValue Chain, SDValue Ptr, 1528 SDValue Stride, SDValue Mask, SDValue EVL, 1529 MachineMemOperand *MMO, bool IsExpanding = false); 1530 SDValue getExtStridedLoadVP(ISD::LoadExtType ExtType, const SDLoc &DL, EVT VT, 1531 SDValue Chain, SDValue Ptr, SDValue Stride, 1532 SDValue Mask, SDValue EVL, EVT MemVT, 1533 MachineMemOperand *MMO, bool IsExpanding = false); 1534 SDValue getStridedStoreVP(SDValue Chain, const SDLoc &DL, SDValue Val, 1535 SDValue Ptr, SDValue Offset, SDValue Stride, 1536 SDValue Mask, SDValue EVL, EVT MemVT, 1537 MachineMemOperand *MMO, ISD::MemIndexedMode AM, 1538 bool IsTruncating = false, 1539 bool IsCompressing = false); 1540 SDValue getTruncStridedStoreVP(SDValue Chain, const SDLoc &DL, SDValue Val, 1541 SDValue Ptr, SDValue Stride, SDValue Mask, 1542 SDValue EVL, EVT SVT, MachineMemOperand *MMO, 1543 bool IsCompressing = false); 1544 1545 SDValue getGatherVP(SDVTList VTs, EVT VT, const SDLoc &dl, 1546 ArrayRef<SDValue> Ops, MachineMemOperand *MMO, 1547 ISD::MemIndexType IndexType); 1548 SDValue getScatterVP(SDVTList VTs, EVT VT, const SDLoc &dl, 1549 ArrayRef<SDValue> Ops, MachineMemOperand *MMO, 1550 ISD::MemIndexType IndexType); 1551 1552 SDValue getMaskedLoad(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Base, 1553 SDValue Offset, SDValue Mask, SDValue Src0, EVT MemVT, 1554 MachineMemOperand *MMO, ISD::MemIndexedMode AM, 1555 ISD::LoadExtType, bool IsExpanding = false); 1556 SDValue getIndexedMaskedLoad(SDValue OrigLoad, const SDLoc &dl, SDValue Base, 1557 SDValue Offset, ISD::MemIndexedMode AM); 1558 SDValue getMaskedStore(SDValue Chain, const SDLoc &dl, SDValue Val, 1559 SDValue Base, SDValue Offset, SDValue Mask, EVT MemVT, 1560 MachineMemOperand *MMO, ISD::MemIndexedMode AM, 1561 bool IsTruncating = false, bool IsCompressing = false); 1562 SDValue getIndexedMaskedStore(SDValue OrigStore, const SDLoc &dl, 1563 SDValue Base, SDValue Offset, 1564 ISD::MemIndexedMode AM); 1565 SDValue getMaskedGather(SDVTList VTs, EVT MemVT, const SDLoc &dl, 1566 ArrayRef<SDValue> Ops, MachineMemOperand *MMO, 1567 ISD::MemIndexType IndexType, ISD::LoadExtType ExtTy); 1568 SDValue getMaskedScatter(SDVTList VTs, EVT MemVT, const SDLoc &dl, 1569 ArrayRef<SDValue> Ops, MachineMemOperand *MMO, 1570 ISD::MemIndexType IndexType, 1571 bool IsTruncating = false); 1572 SDValue getMaskedHistogram(SDVTList VTs, EVT MemVT, const SDLoc &dl, 1573 ArrayRef<SDValue> Ops, MachineMemOperand *MMO, 1574 ISD::MemIndexType IndexType); 1575 1576 SDValue getGetFPEnv(SDValue Chain, const SDLoc &dl, SDValue Ptr, EVT MemVT, 1577 MachineMemOperand *MMO); 1578 SDValue getSetFPEnv(SDValue Chain, const SDLoc &dl, SDValue Ptr, EVT MemVT, 1579 MachineMemOperand *MMO); 1580 1581 /// Construct a node to track a Value* through the backend. 1582 SDValue getSrcValue(const Value *v); 1583 1584 /// Return an MDNodeSDNode which holds an MDNode. 1585 SDValue getMDNode(const MDNode *MD); 1586 1587 /// Return a bitcast using the SDLoc of the value operand, and casting to the 1588 /// provided type. Use getNode to set a custom SDLoc. 1589 SDValue getBitcast(EVT VT, SDValue V); 1590 1591 /// Return an AddrSpaceCastSDNode. 1592 SDValue getAddrSpaceCast(const SDLoc &dl, EVT VT, SDValue Ptr, unsigned SrcAS, 1593 unsigned DestAS); 1594 1595 /// Return a freeze using the SDLoc of the value operand. 1596 SDValue getFreeze(SDValue V); 1597 1598 /// Return an AssertAlignSDNode. 1599 SDValue getAssertAlign(const SDLoc &DL, SDValue V, Align A); 1600 1601 /// Swap N1 and N2 if Opcode is a commutative binary opcode 1602 /// and the canonical form expects the opposite order. 1603 void canonicalizeCommutativeBinop(unsigned Opcode, SDValue &N1, 1604 SDValue &N2) const; 1605 1606 /// Return the specified value casted to 1607 /// the target's desired shift amount type. 1608 SDValue getShiftAmountOperand(EVT LHSTy, SDValue Op); 1609 1610 /// Create the DAG equivalent of vector_partial_reduce where Op1 and Op2 are 1611 /// its operands and ReducedTY is the intrinsic's return type. 1612 SDValue getPartialReduceAdd(SDLoc DL, EVT ReducedTy, SDValue Op1, 1613 SDValue Op2); 1614 1615 /// Expands a node with multiple results to an FP or vector libcall. The 1616 /// libcall is expected to take all the operands of the \p Node followed by 1617 /// output pointers for each of the results. \p CallRetResNo can be optionally 1618 /// set to indicate that one of the results comes from the libcall's return 1619 /// value. 1620 bool expandMultipleResultFPLibCall(RTLIB::Libcall LC, SDNode *Node, 1621 SmallVectorImpl<SDValue> &Results, 1622 std::optional<unsigned> CallRetResNo = {}); 1623 1624 /// Expand the specified \c ISD::VAARG node as the Legalize pass would. 1625 SDValue expandVAArg(SDNode *Node); 1626 1627 /// Expand the specified \c ISD::VACOPY node as the Legalize pass would. 1628 SDValue expandVACopy(SDNode *Node); 1629 1630 /// Return a GlobalAddress of the function from the current module with 1631 /// name matching the given ExternalSymbol. Additionally can provide the 1632 /// matched function. 1633 /// Panic if the function doesn't exist. 1634 SDValue getSymbolFunctionGlobalAddress(SDValue Op, 1635 Function **TargetFunction = nullptr); 1636 1637 /// *Mutate* the specified node in-place to have the 1638 /// specified operands. If the resultant node already exists in the DAG, 1639 /// this does not modify the specified node, instead it returns the node that 1640 /// already exists. If the resultant node does not exist in the DAG, the 1641 /// input node is returned. As a degenerate case, if you specify the same 1642 /// input operands as the node already has, the input node is returned. 1643 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op); 1644 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2); 1645 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 1646 SDValue Op3); 1647 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 1648 SDValue Op3, SDValue Op4); 1649 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 1650 SDValue Op3, SDValue Op4, SDValue Op5); 1651 SDNode *UpdateNodeOperands(SDNode *N, ArrayRef<SDValue> Ops); 1652 1653 /// Creates a new TokenFactor containing \p Vals. If \p Vals contains 64k 1654 /// values or more, move values into new TokenFactors in 64k-1 blocks, until 1655 /// the final TokenFactor has less than 64k operands. 1656 SDValue getTokenFactor(const SDLoc &DL, SmallVectorImpl<SDValue> &Vals); 1657 1658 /// *Mutate* the specified machine node's memory references to the provided 1659 /// list. 1660 void setNodeMemRefs(MachineSDNode *N, 1661 ArrayRef<MachineMemOperand *> NewMemRefs); 1662 1663 // Calculate divergence of node \p N based on its operands. 1664 bool calculateDivergence(SDNode *N); 1665 1666 // Propagates the change in divergence to users 1667 void updateDivergence(SDNode * N); 1668 1669 /// These are used for target selectors to *mutate* the 1670 /// specified node to have the specified return type, Target opcode, and 1671 /// operands. Note that target opcodes are stored as 1672 /// ~TargetOpcode in the node opcode field. The resultant node is returned. 1673 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT); 1674 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT, SDValue Op1); 1675 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT, 1676 SDValue Op1, SDValue Op2); 1677 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT, 1678 SDValue Op1, SDValue Op2, SDValue Op3); 1679 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT, 1680 ArrayRef<SDValue> Ops); 1681 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2); 1682 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, 1683 EVT VT2, ArrayRef<SDValue> Ops); 1684 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, 1685 EVT VT2, EVT VT3, ArrayRef<SDValue> Ops); 1686 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, 1687 EVT VT2, SDValue Op1, SDValue Op2); 1688 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, SDVTList VTs, 1689 ArrayRef<SDValue> Ops); 1690 1691 /// This *mutates* the specified node to have the specified 1692 /// return type, opcode, and operands. 1693 SDNode *MorphNodeTo(SDNode *N, unsigned Opc, SDVTList VTs, 1694 ArrayRef<SDValue> Ops); 1695 1696 /// Mutate the specified strict FP node to its non-strict equivalent, 1697 /// unlinking the node from its chain and dropping the metadata arguments. 1698 /// The node must be a strict FP node. 1699 SDNode *mutateStrictFPToFP(SDNode *Node); 1700 1701 /// These are used for target selectors to create a new node 1702 /// with specified return type(s), MachineInstr opcode, and operands. 1703 /// 1704 /// Note that getMachineNode returns the resultant node. If there is already 1705 /// a node of the specified opcode and operands, it returns that node instead 1706 /// of the current one. 1707 MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT); 1708 MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT, 1709 SDValue Op1); 1710 MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT, 1711 SDValue Op1, SDValue Op2); 1712 MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT, 1713 SDValue Op1, SDValue Op2, SDValue Op3); 1714 MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT, 1715 ArrayRef<SDValue> Ops); 1716 MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1, 1717 EVT VT2, SDValue Op1, SDValue Op2); 1718 MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1, 1719 EVT VT2, SDValue Op1, SDValue Op2, SDValue Op3); 1720 MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1, 1721 EVT VT2, ArrayRef<SDValue> Ops); 1722 MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1, 1723 EVT VT2, EVT VT3, SDValue Op1, SDValue Op2); 1724 MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1, 1725 EVT VT2, EVT VT3, SDValue Op1, SDValue Op2, 1726 SDValue Op3); 1727 MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1, 1728 EVT VT2, EVT VT3, ArrayRef<SDValue> Ops); 1729 MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, 1730 ArrayRef<EVT> ResultTys, ArrayRef<SDValue> Ops); 1731 MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, SDVTList VTs, 1732 ArrayRef<SDValue> Ops); 1733 1734 /// A convenience function for creating TargetInstrInfo::EXTRACT_SUBREG nodes. 1735 SDValue getTargetExtractSubreg(int SRIdx, const SDLoc &DL, EVT VT, 1736 SDValue Operand); 1737 1738 /// A convenience function for creating TargetInstrInfo::INSERT_SUBREG nodes. 1739 SDValue getTargetInsertSubreg(int SRIdx, const SDLoc &DL, EVT VT, 1740 SDValue Operand, SDValue Subreg); 1741 1742 /// Get the specified node if it's already available, or else return NULL. 1743 SDNode *getNodeIfExists(unsigned Opcode, SDVTList VTList, 1744 ArrayRef<SDValue> Ops, const SDNodeFlags Flags); 1745 SDNode *getNodeIfExists(unsigned Opcode, SDVTList VTList, 1746 ArrayRef<SDValue> Ops); 1747 1748 /// Check if a node exists without modifying its flags. 1749 bool doesNodeExist(unsigned Opcode, SDVTList VTList, ArrayRef<SDValue> Ops); 1750 1751 /// Creates a SDDbgValue node. 1752 SDDbgValue *getDbgValue(DIVariable *Var, DIExpression *Expr, SDNode *N, 1753 unsigned R, bool IsIndirect, const DebugLoc &DL, 1754 unsigned O); 1755 1756 /// Creates a constant SDDbgValue node. 1757 SDDbgValue *getConstantDbgValue(DIVariable *Var, DIExpression *Expr, 1758 const Value *C, const DebugLoc &DL, 1759 unsigned O); 1760 1761 /// Creates a FrameIndex SDDbgValue node. 1762 SDDbgValue *getFrameIndexDbgValue(DIVariable *Var, DIExpression *Expr, 1763 unsigned FI, bool IsIndirect, 1764 const DebugLoc &DL, unsigned O); 1765 1766 /// Creates a FrameIndex SDDbgValue node. 1767 SDDbgValue *getFrameIndexDbgValue(DIVariable *Var, DIExpression *Expr, 1768 unsigned FI, 1769 ArrayRef<SDNode *> Dependencies, 1770 bool IsIndirect, const DebugLoc &DL, 1771 unsigned O); 1772 1773 /// Creates a VReg SDDbgValue node. 1774 SDDbgValue *getVRegDbgValue(DIVariable *Var, DIExpression *Expr, 1775 unsigned VReg, bool IsIndirect, 1776 const DebugLoc &DL, unsigned O); 1777 1778 /// Creates a SDDbgValue node from a list of locations. 1779 SDDbgValue *getDbgValueList(DIVariable *Var, DIExpression *Expr, 1780 ArrayRef<SDDbgOperand> Locs, 1781 ArrayRef<SDNode *> Dependencies, bool IsIndirect, 1782 const DebugLoc &DL, unsigned O, bool IsVariadic); 1783 1784 /// Creates a SDDbgLabel node. 1785 SDDbgLabel *getDbgLabel(DILabel *Label, const DebugLoc &DL, unsigned O); 1786 1787 /// Transfer debug values from one node to another, while optionally 1788 /// generating fragment expressions for split-up values. If \p InvalidateDbg 1789 /// is set, debug values are invalidated after they are transferred. 1790 void transferDbgValues(SDValue From, SDValue To, unsigned OffsetInBits = 0, 1791 unsigned SizeInBits = 0, bool InvalidateDbg = true); 1792 1793 /// Remove the specified node from the system. If any of its 1794 /// operands then becomes dead, remove them as well. Inform UpdateListener 1795 /// for each node deleted. 1796 void RemoveDeadNode(SDNode *N); 1797 1798 /// This method deletes the unreachable nodes in the 1799 /// given list, and any nodes that become unreachable as a result. 1800 void RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes); 1801 1802 /// Modify anything using 'From' to use 'To' instead. 1803 /// This can cause recursive merging of nodes in the DAG. Use the first 1804 /// version if 'From' is known to have a single result, use the second 1805 /// if you have two nodes with identical results (or if 'To' has a superset 1806 /// of the results of 'From'), use the third otherwise. 1807 /// 1808 /// These methods all take an optional UpdateListener, which (if not null) is 1809 /// informed about nodes that are deleted and modified due to recursive 1810 /// changes in the dag. 1811 /// 1812 /// These functions only replace all existing uses. It's possible that as 1813 /// these replacements are being performed, CSE may cause the From node 1814 /// to be given new uses. These new uses of From are left in place, and 1815 /// not automatically transferred to To. 1816 /// 1817 void ReplaceAllUsesWith(SDValue From, SDValue To); 1818 void ReplaceAllUsesWith(SDNode *From, SDNode *To); 1819 void ReplaceAllUsesWith(SDNode *From, const SDValue *To); 1820 1821 /// Replace any uses of From with To, leaving 1822 /// uses of other values produced by From.getNode() alone. 1823 void ReplaceAllUsesOfValueWith(SDValue From, SDValue To); 1824 1825 /// Like ReplaceAllUsesOfValueWith, but for multiple values at once. 1826 /// This correctly handles the case where 1827 /// there is an overlap between the From values and the To values. 1828 void ReplaceAllUsesOfValuesWith(const SDValue *From, const SDValue *To, 1829 unsigned Num); 1830 1831 /// If an existing load has uses of its chain, create a token factor node with 1832 /// that chain and the new memory node's chain and update users of the old 1833 /// chain to the token factor. This ensures that the new memory node will have 1834 /// the same relative memory dependency position as the old load. Returns the 1835 /// new merged load chain. 1836 SDValue makeEquivalentMemoryOrdering(SDValue OldChain, SDValue NewMemOpChain); 1837 1838 /// If an existing load has uses of its chain, create a token factor node with 1839 /// that chain and the new memory node's chain and update users of the old 1840 /// chain to the token factor. This ensures that the new memory node will have 1841 /// the same relative memory dependency position as the old load. Returns the 1842 /// new merged load chain. 1843 SDValue makeEquivalentMemoryOrdering(LoadSDNode *OldLoad, SDValue NewMemOp); 1844 1845 /// Topological-sort the AllNodes list and a 1846 /// assign a unique node id for each node in the DAG based on their 1847 /// topological order. Returns the number of nodes. 1848 unsigned AssignTopologicalOrder(); 1849 1850 /// Move node N in the AllNodes list to be immediately 1851 /// before the given iterator Position. This may be used to update the 1852 /// topological ordering when the list of nodes is modified. 1853 void RepositionNode(allnodes_iterator Position, SDNode *N) { 1854 AllNodes.insert(Position, AllNodes.remove(N)); 1855 } 1856 1857 /// Add a dbg_value SDNode. If SD is non-null that means the 1858 /// value is produced by SD. 1859 void AddDbgValue(SDDbgValue *DB, bool isParameter); 1860 1861 /// Add a dbg_label SDNode. 1862 void AddDbgLabel(SDDbgLabel *DB); 1863 1864 /// Get the debug values which reference the given SDNode. 1865 ArrayRef<SDDbgValue*> GetDbgValues(const SDNode* SD) const { 1866 return DbgInfo->getSDDbgValues(SD); 1867 } 1868 1869 public: 1870 /// Return true if there are any SDDbgValue nodes associated 1871 /// with this SelectionDAG. 1872 bool hasDebugValues() const { return !DbgInfo->empty(); } 1873 1874 SDDbgInfo::DbgIterator DbgBegin() const { return DbgInfo->DbgBegin(); } 1875 SDDbgInfo::DbgIterator DbgEnd() const { return DbgInfo->DbgEnd(); } 1876 1877 SDDbgInfo::DbgIterator ByvalParmDbgBegin() const { 1878 return DbgInfo->ByvalParmDbgBegin(); 1879 } 1880 SDDbgInfo::DbgIterator ByvalParmDbgEnd() const { 1881 return DbgInfo->ByvalParmDbgEnd(); 1882 } 1883 1884 SDDbgInfo::DbgLabelIterator DbgLabelBegin() const { 1885 return DbgInfo->DbgLabelBegin(); 1886 } 1887 SDDbgInfo::DbgLabelIterator DbgLabelEnd() const { 1888 return DbgInfo->DbgLabelEnd(); 1889 } 1890 1891 /// To be invoked on an SDNode that is slated to be erased. This 1892 /// function mirrors \c llvm::salvageDebugInfo. 1893 void salvageDebugInfo(SDNode &N); 1894 1895 void dump() const; 1896 1897 /// In most cases this function returns the ABI alignment for a given type, 1898 /// except for illegal vector types where the alignment exceeds that of the 1899 /// stack. In such cases we attempt to break the vector down to a legal type 1900 /// and return the ABI alignment for that instead. 1901 Align getReducedAlign(EVT VT, bool UseABI); 1902 1903 /// Create a stack temporary based on the size in bytes and the alignment 1904 SDValue CreateStackTemporary(TypeSize Bytes, Align Alignment); 1905 1906 /// Create a stack temporary, suitable for holding the specified value type. 1907 /// If minAlign is specified, the slot size will have at least that alignment. 1908 SDValue CreateStackTemporary(EVT VT, unsigned minAlign = 1); 1909 1910 /// Create a stack temporary suitable for holding either of the specified 1911 /// value types. 1912 SDValue CreateStackTemporary(EVT VT1, EVT VT2); 1913 1914 SDValue FoldSymbolOffset(unsigned Opcode, EVT VT, 1915 const GlobalAddressSDNode *GA, 1916 const SDNode *N2); 1917 1918 SDValue FoldConstantArithmetic(unsigned Opcode, const SDLoc &DL, EVT VT, 1919 ArrayRef<SDValue> Ops, 1920 SDNodeFlags Flags = SDNodeFlags()); 1921 1922 /// Fold floating-point operations when all operands are constants and/or 1923 /// undefined. 1924 SDValue foldConstantFPMath(unsigned Opcode, const SDLoc &DL, EVT VT, 1925 ArrayRef<SDValue> Ops); 1926 1927 /// Constant fold a setcc to true or false. 1928 SDValue FoldSetCC(EVT VT, SDValue N1, SDValue N2, ISD::CondCode Cond, 1929 const SDLoc &dl); 1930 1931 /// Return true if the sign bit of Op is known to be zero. 1932 /// We use this predicate to simplify operations downstream. 1933 bool SignBitIsZero(SDValue Op, unsigned Depth = 0) const; 1934 1935 /// Return true if 'Op & Mask' is known to be zero. We 1936 /// use this predicate to simplify operations downstream. Op and Mask are 1937 /// known to be the same type. 1938 bool MaskedValueIsZero(SDValue Op, const APInt &Mask, 1939 unsigned Depth = 0) const; 1940 1941 /// Return true if 'Op & Mask' is known to be zero in DemandedElts. We 1942 /// use this predicate to simplify operations downstream. Op and Mask are 1943 /// known to be the same type. 1944 bool MaskedValueIsZero(SDValue Op, const APInt &Mask, 1945 const APInt &DemandedElts, unsigned Depth = 0) const; 1946 1947 /// Return true if 'Op' is known to be zero in DemandedElts. We 1948 /// use this predicate to simplify operations downstream. 1949 bool MaskedVectorIsZero(SDValue Op, const APInt &DemandedElts, 1950 unsigned Depth = 0) const; 1951 1952 /// Return true if '(Op & Mask) == Mask'. 1953 /// Op and Mask are known to be the same type. 1954 bool MaskedValueIsAllOnes(SDValue Op, const APInt &Mask, 1955 unsigned Depth = 0) const; 1956 1957 /// For each demanded element of a vector, see if it is known to be zero. 1958 APInt computeVectorKnownZeroElements(SDValue Op, const APInt &DemandedElts, 1959 unsigned Depth = 0) const; 1960 1961 /// Determine which bits of Op are known to be either zero or one and return 1962 /// them in Known. For vectors, the known bits are those that are shared by 1963 /// every vector element. 1964 /// Targets can implement the computeKnownBitsForTargetNode method in the 1965 /// TargetLowering class to allow target nodes to be understood. 1966 KnownBits computeKnownBits(SDValue Op, unsigned Depth = 0) const; 1967 1968 /// Determine which bits of Op are known to be either zero or one and return 1969 /// them in Known. The DemandedElts argument allows us to only collect the 1970 /// known bits that are shared by the requested vector elements. 1971 /// Targets can implement the computeKnownBitsForTargetNode method in the 1972 /// TargetLowering class to allow target nodes to be understood. 1973 KnownBits computeKnownBits(SDValue Op, const APInt &DemandedElts, 1974 unsigned Depth = 0) const; 1975 1976 /// Used to represent the possible overflow behavior of an operation. 1977 /// Never: the operation cannot overflow. 1978 /// Always: the operation will always overflow. 1979 /// Sometime: the operation may or may not overflow. 1980 enum OverflowKind { 1981 OFK_Never, 1982 OFK_Sometime, 1983 OFK_Always, 1984 }; 1985 1986 /// Determine if the result of the signed addition of 2 nodes can overflow. 1987 OverflowKind computeOverflowForSignedAdd(SDValue N0, SDValue N1) const; 1988 1989 /// Determine if the result of the unsigned addition of 2 nodes can overflow. 1990 OverflowKind computeOverflowForUnsignedAdd(SDValue N0, SDValue N1) const; 1991 1992 /// Determine if the result of the addition of 2 nodes can overflow. 1993 OverflowKind computeOverflowForAdd(bool IsSigned, SDValue N0, 1994 SDValue N1) const { 1995 return IsSigned ? computeOverflowForSignedAdd(N0, N1) 1996 : computeOverflowForUnsignedAdd(N0, N1); 1997 } 1998 1999 /// Determine if the result of the addition of 2 nodes can never overflow. 2000 bool willNotOverflowAdd(bool IsSigned, SDValue N0, SDValue N1) const { 2001 return computeOverflowForAdd(IsSigned, N0, N1) == OFK_Never; 2002 } 2003 2004 /// Determine if the result of the signed sub of 2 nodes can overflow. 2005 OverflowKind computeOverflowForSignedSub(SDValue N0, SDValue N1) const; 2006 2007 /// Determine if the result of the unsigned sub of 2 nodes can overflow. 2008 OverflowKind computeOverflowForUnsignedSub(SDValue N0, SDValue N1) const; 2009 2010 /// Determine if the result of the sub of 2 nodes can overflow. 2011 OverflowKind computeOverflowForSub(bool IsSigned, SDValue N0, 2012 SDValue N1) const { 2013 return IsSigned ? computeOverflowForSignedSub(N0, N1) 2014 : computeOverflowForUnsignedSub(N0, N1); 2015 } 2016 2017 /// Determine if the result of the sub of 2 nodes can never overflow. 2018 bool willNotOverflowSub(bool IsSigned, SDValue N0, SDValue N1) const { 2019 return computeOverflowForSub(IsSigned, N0, N1) == OFK_Never; 2020 } 2021 2022 /// Determine if the result of the signed mul of 2 nodes can overflow. 2023 OverflowKind computeOverflowForSignedMul(SDValue N0, SDValue N1) const; 2024 2025 /// Determine if the result of the unsigned mul of 2 nodes can overflow. 2026 OverflowKind computeOverflowForUnsignedMul(SDValue N0, SDValue N1) const; 2027 2028 /// Determine if the result of the mul of 2 nodes can overflow. 2029 OverflowKind computeOverflowForMul(bool IsSigned, SDValue N0, 2030 SDValue N1) const { 2031 return IsSigned ? computeOverflowForSignedMul(N0, N1) 2032 : computeOverflowForUnsignedMul(N0, N1); 2033 } 2034 2035 /// Determine if the result of the mul of 2 nodes can never overflow. 2036 bool willNotOverflowMul(bool IsSigned, SDValue N0, SDValue N1) const { 2037 return computeOverflowForMul(IsSigned, N0, N1) == OFK_Never; 2038 } 2039 2040 /// Test if the given value is known to have exactly one bit set. This differs 2041 /// from computeKnownBits in that it doesn't necessarily determine which bit 2042 /// is set. 2043 bool isKnownToBeAPowerOfTwo(SDValue Val, unsigned Depth = 0) const; 2044 2045 /// Test if the given _fp_ value is known to be an integer power-of-2, either 2046 /// positive or negative. 2047 bool isKnownToBeAPowerOfTwoFP(SDValue Val, unsigned Depth = 0) const; 2048 2049 /// Return the number of times the sign bit of the register is replicated into 2050 /// the other bits. We know that at least 1 bit is always equal to the sign 2051 /// bit (itself), but other cases can give us information. For example, 2052 /// immediately after an "SRA X, 2", we know that the top 3 bits are all equal 2053 /// to each other, so we return 3. Targets can implement the 2054 /// ComputeNumSignBitsForTarget method in the TargetLowering class to allow 2055 /// target nodes to be understood. 2056 unsigned ComputeNumSignBits(SDValue Op, unsigned Depth = 0) const; 2057 2058 /// Return the number of times the sign bit of the register is replicated into 2059 /// the other bits. We know that at least 1 bit is always equal to the sign 2060 /// bit (itself), but other cases can give us information. For example, 2061 /// immediately after an "SRA X, 2", we know that the top 3 bits are all equal 2062 /// to each other, so we return 3. The DemandedElts argument allows 2063 /// us to only collect the minimum sign bits of the requested vector elements. 2064 /// Targets can implement the ComputeNumSignBitsForTarget method in the 2065 /// TargetLowering class to allow target nodes to be understood. 2066 unsigned ComputeNumSignBits(SDValue Op, const APInt &DemandedElts, 2067 unsigned Depth = 0) const; 2068 2069 /// Get the upper bound on bit size for this Value \p Op as a signed integer. 2070 /// i.e. x == sext(trunc(x to MaxSignedBits) to bitwidth(x)). 2071 /// Similar to the APInt::getSignificantBits function. 2072 /// Helper wrapper to ComputeNumSignBits. 2073 unsigned ComputeMaxSignificantBits(SDValue Op, unsigned Depth = 0) const; 2074 2075 /// Get the upper bound on bit size for this Value \p Op as a signed integer. 2076 /// i.e. x == sext(trunc(x to MaxSignedBits) to bitwidth(x)). 2077 /// Similar to the APInt::getSignificantBits function. 2078 /// Helper wrapper to ComputeNumSignBits. 2079 unsigned ComputeMaxSignificantBits(SDValue Op, const APInt &DemandedElts, 2080 unsigned Depth = 0) const; 2081 2082 /// Return true if this function can prove that \p Op is never poison 2083 /// and, if \p PoisonOnly is false, does not have undef bits. 2084 bool isGuaranteedNotToBeUndefOrPoison(SDValue Op, bool PoisonOnly = false, 2085 unsigned Depth = 0) const; 2086 2087 /// Return true if this function can prove that \p Op is never poison 2088 /// and, if \p PoisonOnly is false, does not have undef bits. The DemandedElts 2089 /// argument limits the check to the requested vector elements. 2090 bool isGuaranteedNotToBeUndefOrPoison(SDValue Op, const APInt &DemandedElts, 2091 bool PoisonOnly = false, 2092 unsigned Depth = 0) const; 2093 2094 /// Return true if this function can prove that \p Op is never poison. 2095 bool isGuaranteedNotToBePoison(SDValue Op, unsigned Depth = 0) const { 2096 return isGuaranteedNotToBeUndefOrPoison(Op, /*PoisonOnly*/ true, Depth); 2097 } 2098 2099 /// Return true if this function can prove that \p Op is never poison. The 2100 /// DemandedElts argument limits the check to the requested vector elements. 2101 bool isGuaranteedNotToBePoison(SDValue Op, const APInt &DemandedElts, 2102 unsigned Depth = 0) const { 2103 return isGuaranteedNotToBeUndefOrPoison(Op, DemandedElts, 2104 /*PoisonOnly*/ true, Depth); 2105 } 2106 2107 /// Return true if Op can create undef or poison from non-undef & non-poison 2108 /// operands. The DemandedElts argument limits the check to the requested 2109 /// vector elements. 2110 /// 2111 /// \p ConsiderFlags controls whether poison producing flags on the 2112 /// instruction are considered. This can be used to see if the instruction 2113 /// could still introduce undef or poison even without poison generating flags 2114 /// which might be on the instruction. (i.e. could the result of 2115 /// Op->dropPoisonGeneratingFlags() still create poison or undef) 2116 bool canCreateUndefOrPoison(SDValue Op, const APInt &DemandedElts, 2117 bool PoisonOnly = false, 2118 bool ConsiderFlags = true, 2119 unsigned Depth = 0) const; 2120 2121 /// Return true if Op can create undef or poison from non-undef & non-poison 2122 /// operands. 2123 /// 2124 /// \p ConsiderFlags controls whether poison producing flags on the 2125 /// instruction are considered. This can be used to see if the instruction 2126 /// could still introduce undef or poison even without poison generating flags 2127 /// which might be on the instruction. (i.e. could the result of 2128 /// Op->dropPoisonGeneratingFlags() still create poison or undef) 2129 bool canCreateUndefOrPoison(SDValue Op, bool PoisonOnly = false, 2130 bool ConsiderFlags = true, 2131 unsigned Depth = 0) const; 2132 2133 /// Return true if the specified operand is an ISD::OR or ISD::XOR node 2134 /// that can be treated as an ISD::ADD node. 2135 /// or(x,y) == add(x,y) iff haveNoCommonBitsSet(x,y) 2136 /// xor(x,y) == add(x,y) iff isMinSignedConstant(y) && !NoWrap 2137 /// If \p NoWrap is true, this will not match ISD::XOR. 2138 bool isADDLike(SDValue Op, bool NoWrap = false) const; 2139 2140 /// Return true if the specified operand is an ISD::ADD with a ConstantSDNode 2141 /// on the right-hand side, or if it is an ISD::OR with a ConstantSDNode that 2142 /// is guaranteed to have the same semantics as an ADD. This handles the 2143 /// equivalence: 2144 /// X|Cst == X+Cst iff X&Cst = 0. 2145 bool isBaseWithConstantOffset(SDValue Op) const; 2146 2147 /// Test whether the given SDValue (or all elements of it, if it is a 2148 /// vector) is known to never be NaN. If \p SNaN is true, returns if \p Op is 2149 /// known to never be a signaling NaN (it may still be a qNaN). 2150 bool isKnownNeverNaN(SDValue Op, bool SNaN = false, unsigned Depth = 0) const; 2151 2152 /// \returns true if \p Op is known to never be a signaling NaN. 2153 bool isKnownNeverSNaN(SDValue Op, unsigned Depth = 0) const { 2154 return isKnownNeverNaN(Op, true, Depth); 2155 } 2156 2157 /// Test whether the given floating point SDValue is known to never be 2158 /// positive or negative zero. 2159 bool isKnownNeverZeroFloat(SDValue Op) const; 2160 2161 /// Test whether the given SDValue is known to contain non-zero value(s). 2162 bool isKnownNeverZero(SDValue Op, unsigned Depth = 0) const; 2163 2164 /// Test whether the given float value is known to be positive. +0.0, +inf and 2165 /// +nan are considered positive, -0.0, -inf and -nan are not. 2166 bool cannotBeOrderedNegativeFP(SDValue Op) const; 2167 2168 /// Test whether two SDValues are known to compare equal. This 2169 /// is true if they are the same value, or if one is negative zero and the 2170 /// other positive zero. 2171 bool isEqualTo(SDValue A, SDValue B) const; 2172 2173 /// Return true if A and B have no common bits set. As an example, this can 2174 /// allow an 'add' to be transformed into an 'or'. 2175 bool haveNoCommonBitsSet(SDValue A, SDValue B) const; 2176 2177 /// Test whether \p V has a splatted value for all the demanded elements. 2178 /// 2179 /// On success \p UndefElts will indicate the elements that have UNDEF 2180 /// values instead of the splat value, this is only guaranteed to be correct 2181 /// for \p DemandedElts. 2182 /// 2183 /// NOTE: The function will return true for a demanded splat of UNDEF values. 2184 bool isSplatValue(SDValue V, const APInt &DemandedElts, APInt &UndefElts, 2185 unsigned Depth = 0) const; 2186 2187 /// Test whether \p V has a splatted value. 2188 bool isSplatValue(SDValue V, bool AllowUndefs = false) const; 2189 2190 /// If V is a splatted value, return the source vector and its splat index. 2191 SDValue getSplatSourceVector(SDValue V, int &SplatIndex); 2192 2193 /// If V is a splat vector, return its scalar source operand by extracting 2194 /// that element from the source vector. If LegalTypes is true, this method 2195 /// may only return a legally-typed splat value. If it cannot legalize the 2196 /// splatted value it will return SDValue(). 2197 SDValue getSplatValue(SDValue V, bool LegalTypes = false); 2198 2199 /// If a SHL/SRA/SRL node \p V has shift amounts that are all less than the 2200 /// element bit-width of the shift node, return the valid constant range. 2201 std::optional<ConstantRange> 2202 getValidShiftAmountRange(SDValue V, const APInt &DemandedElts, 2203 unsigned Depth) const; 2204 2205 /// If a SHL/SRA/SRL node \p V has a uniform shift amount 2206 /// that is less than the element bit-width of the shift node, return it. 2207 std::optional<uint64_t> getValidShiftAmount(SDValue V, 2208 const APInt &DemandedElts, 2209 unsigned Depth = 0) const; 2210 2211 /// If a SHL/SRA/SRL node \p V has a uniform shift amount 2212 /// that is less than the element bit-width of the shift node, return it. 2213 std::optional<uint64_t> getValidShiftAmount(SDValue V, 2214 unsigned Depth = 0) const; 2215 2216 /// If a SHL/SRA/SRL node \p V has shift amounts that are all less than the 2217 /// element bit-width of the shift node, return the minimum possible value. 2218 std::optional<uint64_t> getValidMinimumShiftAmount(SDValue V, 2219 const APInt &DemandedElts, 2220 unsigned Depth = 0) const; 2221 2222 /// If a SHL/SRA/SRL node \p V has shift amounts that are all less than the 2223 /// element bit-width of the shift node, return the minimum possible value. 2224 std::optional<uint64_t> getValidMinimumShiftAmount(SDValue V, 2225 unsigned Depth = 0) const; 2226 2227 /// If a SHL/SRA/SRL node \p V has shift amounts that are all less than the 2228 /// element bit-width of the shift node, return the maximum possible value. 2229 std::optional<uint64_t> getValidMaximumShiftAmount(SDValue V, 2230 const APInt &DemandedElts, 2231 unsigned Depth = 0) const; 2232 2233 /// If a SHL/SRA/SRL node \p V has shift amounts that are all less than the 2234 /// element bit-width of the shift node, return the maximum possible value. 2235 std::optional<uint64_t> getValidMaximumShiftAmount(SDValue V, 2236 unsigned Depth = 0) const; 2237 2238 /// Match a binop + shuffle pyramid that represents a horizontal reduction 2239 /// over the elements of a vector starting from the EXTRACT_VECTOR_ELT node /p 2240 /// Extract. The reduction must use one of the opcodes listed in /p 2241 /// CandidateBinOps and on success /p BinOp will contain the matching opcode. 2242 /// Returns the vector that is being reduced on, or SDValue() if a reduction 2243 /// was not matched. If \p AllowPartials is set then in the case of a 2244 /// reduction pattern that only matches the first few stages, the extracted 2245 /// subvector of the start of the reduction is returned. 2246 SDValue matchBinOpReduction(SDNode *Extract, ISD::NodeType &BinOp, 2247 ArrayRef<ISD::NodeType> CandidateBinOps, 2248 bool AllowPartials = false); 2249 2250 /// Utility function used by legalize and lowering to 2251 /// "unroll" a vector operation by splitting out the scalars and operating 2252 /// on each element individually. If the ResNE is 0, fully unroll the vector 2253 /// op. If ResNE is less than the width of the vector op, unroll up to ResNE. 2254 /// If the ResNE is greater than the width of the vector op, unroll the 2255 /// vector op and fill the end of the resulting vector with UNDEFS. 2256 SDValue UnrollVectorOp(SDNode *N, unsigned ResNE = 0); 2257 2258 /// Like UnrollVectorOp(), but for the [US](ADD|SUB|MUL)O family of opcodes. 2259 /// This is a separate function because those opcodes have two results. 2260 std::pair<SDValue, SDValue> UnrollVectorOverflowOp(SDNode *N, 2261 unsigned ResNE = 0); 2262 2263 /// Return true if loads are next to each other and can be 2264 /// merged. Check that both are nonvolatile and if LD is loading 2265 /// 'Bytes' bytes from a location that is 'Dist' units away from the 2266 /// location that the 'Base' load is loading from. 2267 bool areNonVolatileConsecutiveLoads(LoadSDNode *LD, LoadSDNode *Base, 2268 unsigned Bytes, int Dist) const; 2269 2270 /// Infer alignment of a load / store address. Return std::nullopt if it 2271 /// cannot be inferred. 2272 MaybeAlign InferPtrAlign(SDValue Ptr) const; 2273 2274 /// Split the scalar node with EXTRACT_ELEMENT using the provided VTs and 2275 /// return the low/high part. 2276 std::pair<SDValue, SDValue> SplitScalar(const SDValue &N, const SDLoc &DL, 2277 const EVT &LoVT, const EVT &HiVT); 2278 2279 /// Compute the VTs needed for the low/hi parts of a type 2280 /// which is split (or expanded) into two not necessarily identical pieces. 2281 std::pair<EVT, EVT> GetSplitDestVTs(const EVT &VT) const; 2282 2283 /// Compute the VTs needed for the low/hi parts of a type, dependent on an 2284 /// enveloping VT that has been split into two identical pieces. Sets the 2285 /// HisIsEmpty flag when hi type has zero storage size. 2286 std::pair<EVT, EVT> GetDependentSplitDestVTs(const EVT &VT, const EVT &EnvVT, 2287 bool *HiIsEmpty) const; 2288 2289 /// Split the vector with EXTRACT_SUBVECTOR using the provided 2290 /// VTs and return the low/high part. 2291 std::pair<SDValue, SDValue> SplitVector(const SDValue &N, const SDLoc &DL, 2292 const EVT &LoVT, const EVT &HiVT); 2293 2294 /// Split the vector with EXTRACT_SUBVECTOR and return the low/high part. 2295 std::pair<SDValue, SDValue> SplitVector(const SDValue &N, const SDLoc &DL) { 2296 EVT LoVT, HiVT; 2297 std::tie(LoVT, HiVT) = GetSplitDestVTs(N.getValueType()); 2298 return SplitVector(N, DL, LoVT, HiVT); 2299 } 2300 2301 /// Split the explicit vector length parameter of a VP operation. 2302 std::pair<SDValue, SDValue> SplitEVL(SDValue N, EVT VecVT, const SDLoc &DL); 2303 2304 /// Split the node's operand with EXTRACT_SUBVECTOR and 2305 /// return the low/high part. 2306 std::pair<SDValue, SDValue> SplitVectorOperand(const SDNode *N, unsigned OpNo) 2307 { 2308 return SplitVector(N->getOperand(OpNo), SDLoc(N)); 2309 } 2310 2311 /// Widen the vector up to the next power of two using INSERT_SUBVECTOR. 2312 SDValue WidenVector(const SDValue &N, const SDLoc &DL); 2313 2314 /// Append the extracted elements from Start to Count out of the vector Op in 2315 /// Args. If Count is 0, all of the elements will be extracted. The extracted 2316 /// elements will have type EVT if it is provided, and otherwise their type 2317 /// will be Op's element type. 2318 void ExtractVectorElements(SDValue Op, SmallVectorImpl<SDValue> &Args, 2319 unsigned Start = 0, unsigned Count = 0, 2320 EVT EltVT = EVT()); 2321 2322 /// Compute the default alignment value for the given type. 2323 Align getEVTAlign(EVT MemoryVT) const; 2324 2325 /// Test whether the given value is a constant int or similar node. 2326 bool isConstantIntBuildVectorOrConstantInt(SDValue N, 2327 bool AllowOpaques = true) const; 2328 2329 /// Test whether the given value is a constant FP or similar node. 2330 bool isConstantFPBuildVectorOrConstantFP(SDValue N) const; 2331 2332 /// \returns true if \p N is any kind of constant or build_vector of 2333 /// constants, int or float. If a vector, it may not necessarily be a splat. 2334 inline bool isConstantValueOfAnyType(SDValue N) const { 2335 return isConstantIntBuildVectorOrConstantInt(N) || 2336 isConstantFPBuildVectorOrConstantFP(N); 2337 } 2338 2339 /// Check if a value \op N is a constant using the target's BooleanContent for 2340 /// its type. 2341 std::optional<bool> isBoolConstant(SDValue N, 2342 bool AllowTruncation = false) const; 2343 2344 /// Set CallSiteInfo to be associated with Node. 2345 void addCallSiteInfo(const SDNode *Node, CallSiteInfo &&CallInfo) { 2346 SDEI[Node].CSInfo = std::move(CallInfo); 2347 } 2348 /// Return CallSiteInfo associated with Node, or a default if none exists. 2349 CallSiteInfo getCallSiteInfo(const SDNode *Node) { 2350 auto I = SDEI.find(Node); 2351 return I != SDEI.end() ? std::move(I->second).CSInfo : CallSiteInfo(); 2352 } 2353 /// Set HeapAllocSite to be associated with Node. 2354 void addHeapAllocSite(const SDNode *Node, MDNode *MD) { 2355 SDEI[Node].HeapAllocSite = MD; 2356 } 2357 /// Return HeapAllocSite associated with Node, or nullptr if none exists. 2358 MDNode *getHeapAllocSite(const SDNode *Node) const { 2359 auto I = SDEI.find(Node); 2360 return I != SDEI.end() ? I->second.HeapAllocSite : nullptr; 2361 } 2362 /// Set PCSections to be associated with Node. 2363 void addPCSections(const SDNode *Node, MDNode *MD) { 2364 SDEI[Node].PCSections = MD; 2365 } 2366 /// Set MMRAMetadata to be associated with Node. 2367 void addMMRAMetadata(const SDNode *Node, MDNode *MMRA) { 2368 SDEI[Node].MMRA = MMRA; 2369 } 2370 /// Return PCSections associated with Node, or nullptr if none exists. 2371 MDNode *getPCSections(const SDNode *Node) const { 2372 auto It = SDEI.find(Node); 2373 return It != SDEI.end() ? It->second.PCSections : nullptr; 2374 } 2375 /// Return the MMRA MDNode associated with Node, or nullptr if none 2376 /// exists. 2377 MDNode *getMMRAMetadata(const SDNode *Node) const { 2378 auto It = SDEI.find(Node); 2379 return It != SDEI.end() ? It->second.MMRA : nullptr; 2380 } 2381 /// Set CalledGlobal to be associated with Node. 2382 void addCalledGlobal(const SDNode *Node, const GlobalValue *GV, 2383 unsigned OpFlags) { 2384 SDEI[Node].CalledGlobal = {GV, OpFlags}; 2385 } 2386 /// Return CalledGlobal associated with Node, or a nullopt if none exists. 2387 std::optional<CalledGlobalInfo> getCalledGlobal(const SDNode *Node) { 2388 auto I = SDEI.find(Node); 2389 return I != SDEI.end() 2390 ? std::make_optional(std::move(I->second).CalledGlobal) 2391 : std::nullopt; 2392 } 2393 /// Set NoMergeSiteInfo to be associated with Node if NoMerge is true. 2394 void addNoMergeSiteInfo(const SDNode *Node, bool NoMerge) { 2395 if (NoMerge) 2396 SDEI[Node].NoMerge = NoMerge; 2397 } 2398 /// Return NoMerge info associated with Node. 2399 bool getNoMergeSiteInfo(const SDNode *Node) const { 2400 auto I = SDEI.find(Node); 2401 return I != SDEI.end() ? I->second.NoMerge : false; 2402 } 2403 2404 /// Copy extra info associated with one node to another. 2405 void copyExtraInfo(SDNode *From, SDNode *To); 2406 2407 /// Return the current function's default denormal handling kind for the given 2408 /// floating point type. 2409 DenormalMode getDenormalMode(EVT VT) const { 2410 return MF->getDenormalMode(VT.getFltSemantics()); 2411 } 2412 2413 bool shouldOptForSize() const; 2414 2415 /// Get the (commutative) neutral element for the given opcode, if it exists. 2416 SDValue getNeutralElement(unsigned Opcode, const SDLoc &DL, EVT VT, 2417 SDNodeFlags Flags); 2418 2419 /// Some opcodes may create immediate undefined behavior when used with some 2420 /// values (integer division-by-zero for example). Therefore, these operations 2421 /// are not generally safe to move around or change. 2422 bool isSafeToSpeculativelyExecute(unsigned Opcode) const { 2423 switch (Opcode) { 2424 case ISD::SDIV: 2425 case ISD::SREM: 2426 case ISD::SDIVREM: 2427 case ISD::UDIV: 2428 case ISD::UREM: 2429 case ISD::UDIVREM: 2430 return false; 2431 default: 2432 return true; 2433 } 2434 } 2435 2436 /// Check if the provided node is save to speculatively executed given its 2437 /// current arguments. So, while `udiv` the opcode is not safe to 2438 /// speculatively execute, a given `udiv` node may be if the denominator is 2439 /// known nonzero. 2440 bool isSafeToSpeculativelyExecuteNode(const SDNode *N) const { 2441 switch (N->getOpcode()) { 2442 case ISD::UDIV: 2443 return isKnownNeverZero(N->getOperand(1)); 2444 default: 2445 return isSafeToSpeculativelyExecute(N->getOpcode()); 2446 } 2447 } 2448 2449 SDValue makeStateFunctionCall(unsigned LibFunc, SDValue Ptr, SDValue InChain, 2450 const SDLoc &DLoc); 2451 2452 private: 2453 void InsertNode(SDNode *N); 2454 bool RemoveNodeFromCSEMaps(SDNode *N); 2455 void AddModifiedNodeToCSEMaps(SDNode *N); 2456 SDNode *FindModifiedNodeSlot(SDNode *N, SDValue Op, void *&InsertPos); 2457 SDNode *FindModifiedNodeSlot(SDNode *N, SDValue Op1, SDValue Op2, 2458 void *&InsertPos); 2459 SDNode *FindModifiedNodeSlot(SDNode *N, ArrayRef<SDValue> Ops, 2460 void *&InsertPos); 2461 SDNode *UpdateSDLocOnMergeSDNode(SDNode *N, const SDLoc &loc); 2462 2463 void DeleteNodeNotInCSEMaps(SDNode *N); 2464 void DeallocateNode(SDNode *N); 2465 2466 void allnodes_clear(); 2467 2468 /// Look up the node specified by ID in CSEMap. If it exists, return it. If 2469 /// not, return the insertion token that will make insertion faster. This 2470 /// overload is for nodes other than Constant or ConstantFP, use the other one 2471 /// for those. 2472 SDNode *FindNodeOrInsertPos(const FoldingSetNodeID &ID, void *&InsertPos); 2473 2474 /// Look up the node specified by ID in CSEMap. If it exists, return it. If 2475 /// not, return the insertion token that will make insertion faster. Performs 2476 /// additional processing for constant nodes. 2477 SDNode *FindNodeOrInsertPos(const FoldingSetNodeID &ID, const SDLoc &DL, 2478 void *&InsertPos); 2479 2480 /// Maps to auto-CSE operations. 2481 std::vector<CondCodeSDNode*> CondCodeNodes; 2482 2483 std::vector<SDNode*> ValueTypeNodes; 2484 std::map<EVT, SDNode*, EVT::compareRawBits> ExtendedValueTypeNodes; 2485 StringMap<SDNode*> ExternalSymbols; 2486 2487 std::map<std::pair<std::string, unsigned>, SDNode *> TargetExternalSymbols; 2488 DenseMap<MCSymbol *, SDNode *> MCSymbols; 2489 2490 FlagInserter *Inserter = nullptr; 2491 }; 2492 2493 template <> struct GraphTraits<SelectionDAG*> : public GraphTraits<SDNode*> { 2494 using nodes_iterator = pointer_iterator<SelectionDAG::allnodes_iterator>; 2495 2496 static nodes_iterator nodes_begin(SelectionDAG *G) { 2497 return nodes_iterator(G->allnodes_begin()); 2498 } 2499 2500 static nodes_iterator nodes_end(SelectionDAG *G) { 2501 return nodes_iterator(G->allnodes_end()); 2502 } 2503 }; 2504 2505 } // end namespace llvm 2506 2507 #endif // LLVM_CODEGEN_SELECTIONDAG_H 2508