/llvm-project/llvm/lib/CodeGen/ |
H A D | LocalStackSlotAllocation.cpp | 54 int FrameIdx; // The frame index member in __anon84125d900111::FrameRef 161 void LocalStackSlotImpl::AdjustStackOffset(MachineFrameInfo &MFI, int FrameIdx, in AdjustStackOffset() argument 372 int FrameIdx = FR.getFrameIndex(); insertFrameReferenceRegisters() local [all...] |
H A D | PrologEpilogInserter.cpp | 482 int FrameIdx; assignCalleeSavedSpillSlots() local 693 AdjustStackOffset(MachineFrameInfo & MFI,int FrameIdx,bool StackGrowsDown,int64_t & Offset,Align & MaxAlign) AdjustStackOffset() argument 768 scavengeStackSlot(MachineFrameInfo & MFI,int FrameIdx,bool StackGrowsDown,Align MaxAlign,BitVector & StackBytesFree) scavengeStackSlot() argument 1391 unsigned FrameIdx = Op.getIndex(); replaceFrameIndexDebugInstr() local [all...] |
H A D | StackFrameLayoutAnalysisPass.cpp | 227 int FrameIdx = FI->getFrameIndex(); genSlotDbgMapping() local
|
H A D | MIRPrinter.cpp | 468 const int FrameIdx = CSInfo.getFrameIdx(); convertStackObjects() local
|
/llvm-project/llvm/lib/Target/MSP430/ |
H A D | MSP430InstrInfo.cpp | 38 storeRegToStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,Register SrcReg,bool isKill,int FrameIdx,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) const storeRegToStackSlot() argument 64 loadRegFromStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,Register DestReg,int FrameIdx,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) const loadRegFromStackSlot() argument [all...] |
H A D | MSP430FrameLowering.cpp | 432 int FrameIdx = MF.getFrameInfo().CreateFixedObject(2, -4, true); processFunctionBeforeFrameFinalized() local
|
/llvm-project/llvm/lib/Target/Xtensa/ |
H A D | XtensaInstrInfo.cpp | 133 addFrameReference(MIB, FrameIdx); in loadRegFromStackSlot() argument 121 storeRegToStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator MBBI,Register SrcReg,bool isKill,int FrameIdx,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) const storeRegToStackSlot() argument
|
/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXPrologEpilogPass.cpp | 111 static inline void AdjustStackOffset(MachineFrameInfo &MFI, int FrameIdx, in AdjustStackOffset()
|
/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZFrameLowering.cpp | 223 CS.setFrameIdx(FrameIdx); in assignCalleeSavedSpillSlots() local 184 int FrameIdx = assignCalleeSavedSpillSlots() local 1039 int FrameIdx = assignCalleeSavedSpillSlots() local 1052 int FrameIdx = MFFrame.CreateStackObject(Size, Alignment, true); assignCalleeSavedSpillSlots() local 1522 for (int FrameIdx = MFFrame.getObjectIndexBegin(); FrameIdx != 0; determineFrameLayout() local [all...] |
H A D | SystemZInstrInfo.cpp | 993 storeRegToStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator MBBI,Register SrcReg,bool isKill,int FrameIdx,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) const storeRegToStackSlot() argument 1008 loadRegFromStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator MBBI,Register DestReg,int FrameIdx,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) const loadRegFromStackSlot() argument
|
/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | GISelKnownBits.cpp | 49 return MF.getFrameInfo().getObjectAlign(FrameIdx); in computeKnownAlignment() local 265 int FrameIdx = MI.getOperand(1).getIndex(); computeKnownBitsImpl() local
|
H A D | CallLowering.cpp | 852 int FrameIdx = MFI.CreateStackObject(OrigTy.getScalarSizeInBits(), handleAssignments() local
|
/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVFrameLowering.cpp | 647 int FrameIdx = Entry.getFrameIdx(); emitPrologue() local 1270 int FrameIdx = Info.getFrameIdx(); processFunctionBeforeFrameFinalized() local 1440 int FrameIdx = MFI.CreateFixedSpillStackObject(Size, Offset); assignCalleeSavedSpillSlots() local 1453 int FrameIdx = MFI.CreateStackObject(Size, Alignment, true); assignCalleeSavedSpillSlots() local [all...] |
H A D | RISCVRegisterInfo.cpp | 666 materializeFrameBaseRegister(MachineBasicBlock * MBB,int FrameIdx,int64_t Offset) const materializeFrameBaseRegister() argument
|
/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SDNodeDbgValue.h | 74 static SDDbgOperand fromFrameIdx(unsigned FrameIdx) { in fromFrameIdx()
|
/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64MachineFunctionInfo.h | 251 setStreamingVGIdx(unsigned FrameIdx) setStreamingVGIdx() argument 333 int FrameIdx = Info.getFrameIdx(); getCalleeSavedStackSize() local
|
H A D | AArch64RegisterInfo.cpp | 803 materializeFrameBaseRegister(MachineBasicBlock * MBB,int FrameIdx,int64_t Offset) const materializeFrameBaseRegister() argument
|
H A D | AArch64FrameLowering.cpp | 576 unsigned FrameIdx = Info.getFrameIdx(); emitCalleeSavedGPRLocations() local 2834 int FrameIdx; global() member 3729 int FrameIdx = MFI.CreateStackObject(8, Align(16), true); assignCalleeSavedSpillSlots() local 3770 int FrameIdx = MFI.CreateStackObject(Size, Alignment, true); assignCalleeSavedSpillSlots() local [all...] |
/llvm-project/llvm/lib/CodeGen/MIRParser/ |
H A D | MIRParser.cpp | 910 parseCalleeSavedRegister(PerFunctionMIParsingState & PFS,std::vector<CalleeSavedInfo> & CSIInfo,const yaml::StringValue & RegisterSource,bool IsRestored,int FrameIdx) parseCalleeSavedRegister() argument 959 parseStackObjectsDebugInfo(PerFunctionMIParsingState & PFS,const T & Object,int FrameIdx) parseStackObjectsDebugInfo() argument
|
/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | TargetRegisterInfo.h | 998 hasReservedSpillSlot(const MachineFunction & MF,Register Reg,int & FrameIdx) hasReservedSpillSlot() argument 1037 materializeFrameBaseRegister(MachineBasicBlock * MBB,int FrameIdx,int64_t Offset) materializeFrameBaseRegister() argument
|
H A D | MachineFrameInfo.h | 37 int FrameIdx; member
|
/llvm-project/llvm/lib/Target/X86/ |
H A D | X86FastPreTileConfig.cpp | 129 int FrameIdx = MFI->CreateSpillStackObject(Size, Alignment); getStackSpaceFor() local
|
/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCInstrInfo.cpp | 1984 unsigned DestReg, int FrameIdx, in LoadRegFromStackSlot() argument 1927 StoreRegToStackSlot(MachineFunction & MF,unsigned SrcReg,bool isKill,int FrameIdx,const TargetRegisterClass * RC,SmallVectorImpl<MachineInstr * > & NewMIs) const StoreRegToStackSlot() argument 1950 storeRegToStackSlotNoUpd(MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,unsigned SrcReg,bool isKill,int FrameIdx,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI) const storeRegToStackSlotNoUpd() argument 1970 storeRegToStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,Register SrcReg,bool isKill,int FrameIdx,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) const storeRegToStackSlot() argument 1995 loadRegFromStackSlotNoUpd(MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,unsigned DestReg,int FrameIdx,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI) const loadRegFromStackSlotNoUpd() argument 2017 loadRegFromStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,Register DestReg,int FrameIdx,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) const loadRegFromStackSlot() argument [all...] |
/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMBaseRegisterInfo.cpp | 666 materializeFrameBaseRegister(MachineBasicBlock * MBB,int FrameIdx,int64_t Offset) const materializeFrameBaseRegister() argument
|
/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 456 int FrameIdx = MF.getFrameInfo().CreateFixedObject(4, 64, true); LowerFormalArguments_32() local 477 int FrameIdx = MF.getFrameInfo(). LowerFormalArguments_32() local 607 int FrameIdx = MF.getFrameInfo().CreateFixedObject(4, ArgOffset, LowerFormalArguments_32() local
|