| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsMCCodeEmitter.cpp | 135 SmallVectorImpl<MCFixup> &Fixups, in encodeInstruction()
226 SmallVectorImpl<MCFixup> &Fixups, in getBranchTargetOpValue()
248 SmallVectorImpl<MCFixup> &Fixups, in getBranchTargetOpValue1SImm16()
270 SmallVectorImpl<MCFixup> &Fixups, in getBranchTargetOpValueMMR6()
293 SmallVectorImpl<MCFixup> &Fixups, in getBranchTargetOpValueLsl2MMR6()
316 SmallVectorImpl<MCFixup> &Fixups, in getBranchTarget7OpValueMM()
337 SmallVectorImpl<MCFixup> &Fixups, in getBranchTargetOpValueMMPC10()
358 SmallVectorImpl<MCFixup> &Fixups, in getBranchTargetOpValueMM()
380 SmallVectorImpl<MCFixup> &Fixups, in getBranchTarget21OpValue()
402 SmallVectorImpl<MCFixup> &Fixups, in getBranchTarget21OpValueMM()
[all …]
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 224 SmallVectorImpl<MCFixup> &Fixups, in getMachineOpValue()
235 SmallVectorImpl<MCFixup> &Fixups, in getLdStUImm12OpValue()
256 SmallVectorImpl<MCFixup> &Fixups, in getAdrLabelOpValue()
282 SmallVectorImpl<MCFixup> &Fixups, in getAddSubImmOpValue()
318 const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups, in getCondBranchTargetOpValue()
340 SmallVectorImpl<MCFixup> &Fixups, in getPAuthPCRelOpValue()
363 SmallVectorImpl<MCFixup> &Fixups, in getLoadLiteralOpValue()
383 SmallVectorImpl<MCFixup> &Fixups, in getMemExtendOpValue()
392 SmallVectorImpl<MCFixup> &Fixups, in getMoveWideImmOpValue()
411 const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups, in getTestBranchTargetOpValue()
[all …]
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| H A D | PPCMCCodeEmitter.cpp | 45 SmallVectorImpl<MCFixup> &Fixups, in getDirectBrEncoding()
155 SmallVectorImpl<MCFixup> &Fixups, in getCondBrEncoding()
168 SmallVectorImpl<MCFixup> &Fixups, in getAbsDirectBrEncoding()
181 SmallVectorImpl<MCFixup> &Fixups, in getAbsCondBrEncoding()
194 SmallVectorImpl<MCFixup> &Fixups, in getVSRpEvenEncoding()
203 SmallVectorImpl<MCFixup> &Fixups, in getImm16Encoding()
215 SmallVectorImpl<MCFixup> &Fixups, in getImm34Encoding()
230 SmallVectorImpl<MCFixup> &Fixups, in getImm34EncodingNoPCRel()
238 SmallVectorImpl<MCFixup> &Fixups, in getImm34EncodingPCRel()
245 SmallVectorImpl<MCFixup> &Fixups, in getDispRIEncoding()
[all …]
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCCodeEmitter.cpp | 234 SmallVectorImpl<MCFixup> &Fixups, in getLdStmModeOpValue()
309 SmallVectorImpl<MCFixup> &Fixups, in getCCOutOpValue()
317 SmallVectorImpl<MCFixup> &Fixups, in getModImmOpValue()
336 SmallVectorImpl<MCFixup> &Fixups, in getT2SOImmOpValue()
377 SmallVectorImpl<MCFixup> &Fixups, in getNEONVcvtImm32OpValue()
543 SmallVectorImpl<MCFixup> &Fixups, in getMachineOpValue()
582 unsigned &Imm, SmallVectorImpl<MCFixup> &Fixups, in EncodeAddrModeOpValues()
612 SmallVectorImpl<MCFixup> &Fixups, in getBranchTargetOpValue()
649 SmallVectorImpl<MCFixup> &Fixups, in getThumbBLTargetOpValue()
662 SmallVectorImpl<MCFixup> &Fixups, in getThumbBLXTargetOpValue()
[all …]
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| H A D | SystemZMCCodeEmitter.cpp | 88 SmallVectorImpl<MCFixup> &Fixups, in getPC16DBLEncoding() argument
94 getPC32DBLEncoding(const MCInst & MI,unsigned OpNum,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getPC32DBLEncoding() argument
100 getPC16DBLTLSEncoding(const MCInst & MI,unsigned OpNum,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getPC16DBLTLSEncoding() argument
106 getPC32DBLTLSEncoding(const MCInst & MI,unsigned OpNum,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getPC32DBLTLSEncoding() argument
112 getPC12DBLBPPEncoding(const MCInst & MI,unsigned OpNum,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getPC12DBLBPPEncoding() argument
118 getPC16DBLBPPEncoding(const MCInst & MI,unsigned OpNum,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getPC16DBLBPPEncoding() argument
124 getPC24DBLBPPEncoding(const MCInst & MI,unsigned OpNum,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getPC24DBLBPPEncoding() argument
135 encodeInstruction(const MCInst & MI,SmallVectorImpl<char> & CB,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const encodeInstruction() argument
149 getMachineOpValue(const MCInst & MI,const MCOperand & MO,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getMachineOpValue() argument
162 getImmOpValue(const MCInst & MI,unsigned OpNum,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getImmOpValue() argument
184 getLenEncoding(const MCInst & MI,unsigned OpNum,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getLenEncoding() argument
191 getPCRelEncoding(const MCInst & MI,unsigned OpNum,SmallVectorImpl<MCFixup> & Fixups,unsigned Kind,int64_t Offset,bool AllowTLS) const getPCRelEncoding() argument
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Xtensa/MCTargetDesc/ |
| H A D | XtensaMCCodeEmitter.cpp | 127 SmallVectorImpl<MCFixup> &Fixups, in encodeInstruction()
147 SmallVectorImpl<MCFixup> &Fixups, in getMachineOpValue()
162 SmallVectorImpl<MCFixup> &Fixups, in getJumpTargetEncoding()
176 const MCInst &MI, unsigned int OpNum, SmallVectorImpl<MCFixup> &Fixups, in getBranchTargetEncoding()
200 SmallVectorImpl<MCFixup> &Fixups, in getCallEncoding()
221 SmallVectorImpl<MCFixup> &Fixups, in getL32RTargetEncoding()
241 SmallVectorImpl<MCFixup> &Fixups, in getMemRegEncoding()
274 SmallVectorImpl<MCFixup> &Fixups, in getImm8OpValue()
286 SmallVectorImpl<MCFixup> &Fixups, in getImm8_sh8OpValue()
299 SmallVectorImpl<MCFixup> &Fixups, in getImm12OpValue()
[all …]
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/CSKY/MCTargetDesc/ |
| H A D | CSKYMCCodeEmitter.cpp | 31 SmallVectorImpl<MCFixup> &Fixups, in getOImmOpValue()
40 SmallVectorImpl<MCFixup> &Fixups, in getImmOpValueIDLY()
51 SmallVectorImpl<MCFixup> &Fixups, in getImmOpValueMSBSize()
69 SmallVectorImpl<MCFixup> &Fixups, in expandJBTF()
95 SmallVectorImpl<MCFixup> &Fixups, in expandNEG()
117 SmallVectorImpl<MCFixup> &Fixups, in expandRSUBI()
140 SmallVectorImpl<MCFixup> &Fixups, in encodeInstruction()
236 SmallVectorImpl<MCFixup> &Fixups, in getMachineOpValue()
250 SmallVectorImpl<MCFixup> &Fixups, in getRegSeqImmOpValue()
266 SmallVectorImpl<MCFixup> &Fixups, in getRegisterSeqOpValue()
[all …]
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| H A D | CSKYMCCodeEmitter.h | 51 SmallVectorImpl<MCFixup> &Fixups, in getImmOpValue()
89 SmallVectorImpl<MCFixup> &Fixups, in getImmShiftOpValue()
100 SmallVectorImpl<MCFixup> &Fixups, in getBranchSymbolOpValue()
119 SmallVectorImpl<MCFixup> &Fixups, in getConstpoolSymbolOpValue()
134 SmallVectorImpl<MCFixup> &Fixups, in getDataSymbolOpValue()
148 SmallVectorImpl<MCFixup> &Fixups, in getCallSymbolOpValue()
162 SmallVectorImpl<MCFixup> &Fixups, in getBareSymbolOpValue()
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AVR/MCTargetDesc/ |
| H A D | AVRMCCodeEmitter.cpp | 94 SmallVectorImpl<MCFixup> &Fixups, in encodeRelCondBrTarget()
114 SmallVectorImpl<MCFixup> &Fixups, in encodeLDSTPtrReg()
138 SmallVectorImpl<MCFixup> &Fixups, in encodeMemri()
175 SmallVectorImpl<MCFixup> &Fixups, in encodeComplement()
186 SmallVectorImpl<MCFixup> &Fixups, in encodeImm()
211 SmallVectorImpl<MCFixup> &Fixups, in encodeCallTarget()
229 SmallVectorImpl<MCFixup> &Fixups, in getExprOpValue()
257 SmallVectorImpl<MCFixup> &Fixups, in getMachineOpValue()
275 SmallVectorImpl<MCFixup> &Fixups, in encodeInstruction()
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Sparc/MCTargetDesc/ |
| H A D | SparcMCCodeEmitter.cpp | 92 SmallVectorImpl<MCFixup> &Fixups, in encodeInstruction()
123 SmallVectorImpl<MCFixup> &Fixups, in getMachineOpValue()
149 SmallVectorImpl<MCFixup> &Fixups, in getSImm13OpValue()
180 SmallVectorImpl<MCFixup> &Fixups, in getCallTargetOpValue()
207 SmallVectorImpl<MCFixup> &Fixups, in getBranchTargetOpValue()
220 SmallVectorImpl<MCFixup> &Fixups, in getBranchPredTargetOpValue()
233 SmallVectorImpl<MCFixup> &Fixups, in getBranchOnRegTargetOpValue()
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVMCCodeEmitter.cpp | 121 expandFunctionCall(const MCInst & MI,SmallVectorImpl<char> & CB,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const expandFunctionCall() argument
163 expandTLSDESCCall(const MCInst & MI,SmallVectorImpl<char> & CB,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const expandTLSDESCCall() argument
184 expandAddTPRel(const MCInst & MI,SmallVectorImpl<char> & CB,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const expandAddTPRel() argument
243 expandLongCondBr(const MCInst & MI,SmallVectorImpl<char> & CB,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const expandLongCondBr() argument
298 encodeInstruction(const MCInst & MI,SmallVectorImpl<char> & CB,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const encodeInstruction() argument
356 getMachineOpValue(const MCInst & MI,const MCOperand & MO,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getMachineOpValue() argument
371 getImmOpValueAsr1(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getImmOpValueAsr1() argument
385 getImmOpValue(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getImmOpValue() argument
528 getVMaskReg(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getVMaskReg() argument
544 getRlistOpValue(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getRlistOpValue() argument
554 getRegReg(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getRegReg() argument
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/MSP430/MCTargetDesc/ |
| H A D | MSP430MCCodeEmitter.cpp | 84 SmallVectorImpl<MCFixup> &Fixups, in encodeInstruction()
105 SmallVectorImpl<MCFixup> &Fixups, in getMachineOpValue()
123 SmallVectorImpl<MCFixup> &Fixups, in getMemOpValue()
155 SmallVectorImpl<MCFixup> &Fixups, in getPCRelImmOpValue()
168 SmallVectorImpl<MCFixup> &Fixups, in getCGImmOpValue()
187 SmallVectorImpl<MCFixup> &Fixups, in getCCOpValue()
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/LoongArch/MCTargetDesc/ |
| H A D | LoongArchMCCodeEmitter.cpp | 79 getImmOpValueAsr(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getImmOpValueAsr() argument
98 getMachineOpValue(const MCInst & MI,const MCOperand & MO,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getMachineOpValue() argument
114 getImmOpValueSub1(const MCInst & MI,unsigned OpNo,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getImmOpValueSub1() argument
121 getExprOpValue(const MCInst & MI,const MCOperand & MO,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getExprOpValue() argument
295 expandToVectorLDI(const MCInst & MI,SmallVectorImpl<char> & CB,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const expandToVectorLDI() argument
321 encodeInstruction(const MCInst & MI,SmallVectorImpl<char> & CB,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const encodeInstruction() argument
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/VE/MCTargetDesc/ |
| H A D | VEMCCodeEmitter.cpp | 82 SmallVectorImpl<MCFixup> &Fixups, in encodeInstruction()
92 SmallVectorImpl<MCFixup> &Fixups, in getMachineOpValue()
118 SmallVectorImpl<MCFixup> &Fixups, in getBranchTargetOpValue()
130 SmallVectorImpl<MCFixup> &Fixups, in getCCOpValue()
140 SmallVectorImpl<MCFixup> &Fixups, in getRDOpValue()
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/ |
| H A D | LanaiMCCodeEmitter.cpp | 111 const MCInst &Inst, const MCOperand &MCOp, SmallVectorImpl<MCFixup> &Fixups, in getMachineOpValue()
175 SmallVectorImpl<MCFixup> &Fixups, in encodeInstruction()
186 const MCInst &Inst, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups, in getRiMemoryOpValue()
218 const MCInst &Inst, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups, in getRrMemoryOpValue()
257 SmallVectorImpl<MCFixup> &Fixups, in getSplsOpValue()
289 const MCInst &Inst, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups, in getBranchTargetOpValue()
|
| H A D | LanaiFixupKinds.h | 24 enum Fixups { enum
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | AMDGPUMCCodeEmitter.cpp | 326 encodeInstruction(const MCInst & MI,SmallVectorImpl<char> & CB,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const encodeInstruction() argument
421 getSOPPBrEncoding(const MCInst & MI,unsigned OpNo,APInt & Op,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getSOPPBrEncoding() argument
437 getSMEMOffsetEncoding(const MCInst & MI,unsigned OpNo,APInt & Op,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getSMEMOffsetEncoding() argument
446 getSDWASrcEncoding(const MCInst & MI,unsigned OpNo,APInt & Op,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getSDWASrcEncoding() argument
477 getSDWAVopcDstEncoding(const MCInst & MI,unsigned OpNo,APInt & Op,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getSDWAVopcDstEncoding() argument
495 getAVOperandEncoding(const MCInst & MI,unsigned OpNo,APInt & Op,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getAVOperandEncoding() argument
549 getMachineOpValue(const MCInst & MI,const MCOperand & MO,APInt & Op,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getMachineOpValue() argument
564 getMachineOpValueT16(const MCInst & MI,unsigned OpNo,APInt & Op,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getMachineOpValueT16() argument
611 getMachineOpValueT16Lo128(const MCInst & MI,unsigned OpNo,APInt & Op,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getMachineOpValueT16Lo128() argument
627 getMachineOpValueCommon(const MCInst & MI,const MCOperand & MO,unsigned OpNo,APInt & Op,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getMachineOpValueCommon() argument
[all...] |
| H A D | AMDGPUFixupKinds.h | 16 enum Fixups { enum
|
| H A D | R600MCCodeEmitter.cpp | 88 SmallVectorImpl<MCFixup> &Fixups, in encodeInstruction() argument
158 getMachineOpValue(const MCInst & MI,const MCOperand & MO,SmallVectorImpl<MCFixup> & Fixups,const MCSubtargetInfo & STI) const getMachineOpValue() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/M68k/MCTargetDesc/ |
| H A D | M68kMCCodeEmitter.cpp | 119 SmallVectorImpl<MCFixup> &Fixups, in encodeRelocImm()
146 SmallVectorImpl<MCFixup> &Fixups, in encodePCRelImm()
181 SmallVectorImpl<MCFixup> &Fixups, in encodeFPSYSSelect()
201 SmallVectorImpl<MCFixup> &Fixups, in getMachineOpValue()
228 SmallVectorImpl<MCFixup> &Fixups, in encodeInstruction()
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/BPF/MCTargetDesc/ |
| H A D | BPFMCCodeEmitter.cpp | 81 SmallVectorImpl<MCFixup> &Fixups, in getMachineOpValue()
115 SmallVectorImpl<MCFixup> &Fixups, in encodeInstruction()
153 SmallVectorImpl<MCFixup> &Fixups, in getMemoryOpValue()
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCCodeEmitter.cpp | 369 SmallVectorImpl<MCFixup> &Fixups, in encodeInstruction()
400 SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI, in encodeSingleInstruction()
577 const MCOperand &MO, const MCExpr *ME, SmallVectorImpl<MCFixup> &Fixups, in getExprOpValue()
709 SmallVectorImpl<MCFixup> &Fixups, in getMachineOpValue()
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| /freebsd-src/contrib/llvm-project/llvm/lib/MCA/ |
| H A D | CodeEmitter.cpp | 23 SmallVector<llvm::MCFixup, 2> Fixups; in getOrCreateEncodingInfo() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/WebAssembly/MCTargetDesc/ |
| H A D | WebAssemblyFixupKinds.h | 16 enum Fixups { enum
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86FixupKinds.h | 16 enum Fixups { enum
|