| /freebsd-src/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.h | 131 shouldReduceLoadWidth(SDNode * Load,ISD::LoadExtType ExtTy,EVT NewVT) shouldReduceLoadWidth() argument
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| /freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | BasicTTIImpl.h | 2101 Type *ExtTy = RetTy->getWithNewBitWidth(ExtSize); getTypeBasedIntrinsicInstrCost() local
2167 Type *ExtTy = MulTy->getWithNewBitWidth(ExtSize); getTypeBasedIntrinsicInstrCost() local
2530 VectorType *ExtTy = VectorType::get(ResTy, Ty); getExtendedReductionCost() local
2546 VectorType *ExtTy = VectorType::get(ResTy, Ty); getMulAccReductionCost() local
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| H A D | TargetLowering.h | 1728 shouldReduceLoadWidth(SDNode * Load,ISD::LoadExtType ExtTy,EVT NewVT) shouldReduceLoadWidth() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TypePromotion.cpp | 112 IntegerType *ExtTy = nullptr; member in __anon0e46b04f0111::IRPromoter
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| H A D | CodeGenPrepare.cpp | 4284 ExtType ExtTy = IsSExt ? SignExtension : ZeroExtension; addPromotedInst() local
4306 ExtType ExtTy = IsSExt ? SignExtension : ZeroExtension; getOrigType() local
4518 Type *ExtTy = Ext->getType(); getAction() local
5919 Type *ExtTy = FirstUser->getType(); hasSameExtUse() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64LegalizerInfo.cpp | 1480 LLT MidTy, ExtTy; legalizeIntrinsic() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 343 LLT ExtTy = getLLTForType(*RetInfo.Ty, DL); in lowerReturnVal() local
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| H A D | AMDGPUISelLowering.cpp | 771 shouldReduceLoadWidth(SDNode * N,ISD::LoadExtType ExtTy,EVT NewVT) const shouldReduceLoadWidth() argument
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| /freebsd-src/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | GlobalISelEmitter.cpp | 1520 const TypeSetByHwMode &ExtTy = Dst->getExtType(I); importExplicitDefRenderers() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 2429 MVT ExtTy = MVT::getVectorVT(MVT::i16, Ty.getVectorNumElements()); LowerVECTOR_SHIFT() local
3815 shouldReduceLoadWidth(SDNode * Load,ISD::LoadExtType ExtTy,EVT NewVT) const shouldReduceLoadWidth() argument
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| H A D | HexagonISelLoweringHVX.cpp | 890 MVT ExtTy = ty(ExtVec); in buildHvxVectorReg() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 2236 CreateReg(unsigned RegNum,RegKind Kind,SMLoc S,SMLoc E,MCContext & Ctx,RegConstraintEqualityTy EqTy=RegConstraintEqualityTy::EqualsReg,AArch64_AM::ShiftExtendType ExtTy=AArch64_AM::LSL,unsigned ShiftAmount=0,unsigned HasExplicitAmount=false) CreateReg() argument
2255 CreateVectorReg(unsigned RegNum,RegKind Kind,unsigned ElementWidth,SMLoc S,SMLoc E,MCContext & Ctx,AArch64_AM::ShiftExtendType ExtTy=AArch64_AM::LSL,unsigned ShiftAmount=0,unsigned HasExplicitAmount=false) CreateVectorReg() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/ |
| H A D | AddressSanitizer.cpp | 1390 Type *ExtTy = VectorType::get(IntptrTy, cast<VectorType>(Ty)); getInterestingMemoryOperands() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/IR/ |
| H A D | AutoUpgrade.cpp | 2470 Type *ExtTy = Type::getInt32Ty(C); UpgradeIntrinsicCall() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 9346 getMaskedLoad(EVT VT,const SDLoc & dl,SDValue Chain,SDValue Base,SDValue Offset,SDValue Mask,SDValue PassThru,EVT MemVT,MachineMemOperand * MMO,ISD::MemIndexedMode AM,ISD::LoadExtType ExtTy,bool isExpanding) getMaskedLoad() argument
9440 getMaskedGather(SDVTList VTs,EVT MemVT,const SDLoc & dl,ArrayRef<SDValue> Ops,MachineMemOperand * MMO,ISD::MemIndexType IndexType,ISD::LoadExtType ExtTy) getMaskedGather() argument
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| H A D | DAGCombiner.cpp | 21925 ISD::LoadExtType ExtTy = scalarizeExtractedVectorLoad() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 3939 LLT ExtTy = MRI.getType(DstReg); applyExtendThroughPhis() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 4456 addRequiredExtensionForVectorMULL(SDValue N,SelectionDAG & DAG,const EVT & OrigTy,const EVT & ExtTy,unsigned ExtOpcode) addRequiredExtensionForVectorMULL() argument
14662 shouldReduceLoadWidth(SDNode * Load,ISD::LoadExtType ExtTy,EVT NewVT) const shouldReduceLoadWidth() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | ScalarEvolution.cpp | 3457 IntegerType *ExtTy = getUDivExpr() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 9493 AddRequiredExtensionForVMULL(SDValue N,SelectionDAG & DAG,const EVT & OrigTy,const EVT & ExtTy,unsigned ExtOpcode) AddRequiredExtensionForVMULL() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 3010 shouldReduceLoadWidth(SDNode * Load,ISD::LoadExtType ExtTy,EVT NewVT) const shouldReduceLoadWidth() argument
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