| /openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonConstExtenders.cpp | 1608 unsigned ExtOpc = MI.getOpcode(); in replaceInstrExact() local
1726 unsigned ExtOpc = MI.getOpcode(); in replaceInstrExpr() local
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| H A D | HexagonBitSimplify.cpp | 2542 unsigned ExtOpc = 0; in simplifyExtractLow() local
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| H A D | HexagonISelLoweringHVX.cpp | 1585 unsigned ExtOpc = Signed ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in resizeToWidth() local
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.cpp | 503 MachineInstrBuilder MachineIRBuilder::buildExtOrTrunc(unsigned ExtOpc, in buildExtOrTrunc()
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| H A D | LegalizerHelper.cpp | 2116 unsigned ExtOpc = MI.getOpcode() == TargetOpcode::G_CTTZ || in widenScalar() local
2386 unsigned ExtOpc = LI.getExtOpcodeForWideningConstant( in widenScalar() local
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| H A D | CombinerHelper.cpp | 492 static unsigned getExtLoadOpcForExtend(unsigned ExtOpc) { in getExtLoadOpcForExtend()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 2785 unsigned ExtOpc = in lowerScalarSplat() local
2852 unsigned ExtOpc = in lowerScalarInsert() local
5455 unsigned ExtOpc = in lowerVectorIntrinsicScalars() local
7637 unsigned ExtOpc = ISD::ANY_EXTEND) { in customLegalizeToWOp()
7873 unsigned ExtOpc = ISD::ANY_EXTEND; in ReplaceNodeResults() local
9033 unsigned ExtOpc = *SExt ? RISCVISD::VSEXT_VL : RISCVISD::VZEXT_VL; in getOrCreateExtendedOp() local
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| /openbsd-src/gnu/llvm/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 998 unsigned ExtOpc = ISD::ANY_EXTEND) { in customLegalizeToWOp()
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| /openbsd-src/gnu/llvm/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCalls.cpp | 2807 Instruction::CastOps ExtOpc = Instruction::CastOps::CastOpsEnd; in visitCallInst() local
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86TargetTransformInfo.cpp | 3002 unsigned ExtOpc = in getCastInstrCost() local
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| H A D | X86ISelLowering.cpp | 22237 static SDValue SplitAndExtendv16i1(unsigned ExtOpc, MVT VT, SDValue In, in SplitAndExtendv16i1()
25916 unsigned ExtOpc = in LowerEXTEND_VECTOR_INREG() local
30727 unsigned ExtOpc = Opc == ISD::SRA ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in LowerShift() local
33404 unsigned ExtOpc = IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in ReplaceNodeResults() local
47757 unsigned ExtOpc = LHS.getOpcode(); in combineShiftToPMULH() local
48174 unsigned ExtOpc = IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in combineVectorPack() local
57237 ISD::NodeType ExtOpc = IsBool ? getExtendForContent(BCont) in LowerAsmOperandForConstraint() local
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterBankInfo.cpp | 1907 unsigned ExtOpc, in extendLow32IntoHigh32()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 1312 unsigned ExtOpc = in PromoteOperand() local
6359 unsigned ExtOpc = N0.getOpcode(); in visitAND() local
11867 unsigned ExtOpc, in ExtendUsesToFormExtLoad()
12204 ISD::NodeType ExtOpc) { in tryToFoldExtOfLoad()
12247 ISD::NodeType ExtOpc) { in tryToFoldExtOfMaskedLoad()
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| H A D | LegalizeIntegerTypes.cpp | 5444 unsigned ExtOpc = ISD::ANY_EXTEND; in PromoteIntRes_BUILD_VECTOR() local
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| H A D | TargetLowering.cpp | 5262 ISD::NodeType ExtOpc = in LowerAsmOperandForConstraint() local
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