| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PreLegalizerCombiner.cpp | 422 auto ExtOpc = ExtMI->getOpcode(); in matchExtUaddvToUaddlv() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonConstExtenders.cpp | 1608 unsigned ExtOpc = MI.getOpcode(); replaceInstrExact() local
1726 unsigned ExtOpc = MI.getOpcode(); replaceInstrExpr() local
[all...] |
| H A D | HexagonBitSimplify.cpp | 2542 unsigned ExtOpc = 0; simplifyExtractLow() local
[all...] |
| H A D | HexagonISelLoweringHVX.cpp | 1585 unsigned ExtOpc = Signed ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in resizeToWidth() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.cpp | 526 buildExtOrTrunc(unsigned ExtOpc,const DstOp & Res,const SrcOp & Op) buildExtOrTrunc() argument
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| H A D | LegalizerHelper.cpp | 2396 unsigned ExtOpc = MI.getOpcode() == TargetOpcode::G_CTTZ || widenScalar() local
2677 unsigned ExtOpc = LI.getExtOpcodeForWideningConstant( widenScalar() local
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| H A D | CombinerHelper.cpp | 530 getExtLoadOpcForExtend(unsigned ExtOpc) getExtLoadOpcForExtend() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 4015 unsigned ExtOpc = lowerScalarSplat() local
4082 unsigned ExtOpc = lowerScalarInsert() local
8267 unsigned ExtOpc = lowerVectorIntrinsicScalars() local
11360 customLegalizeToWOp(SDNode * N,SelectionDAG & DAG,unsigned ExtOpc=ISD::ANY_EXTEND) customLegalizeToWOp() argument
11637 unsigned ExtOpc = ISD::ANY_EXTEND; ReplaceNodeResults() local
13085 unsigned ExtOpc = *SExt ? RISCVISD::VSEXT_VL : RISCVISD::VZEXT_VL; getOrCreateExtendedOp() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCalls.cpp | 3305 Instruction::CastOps ExtOpc = Instruction::CastOps::CastOpsEnd; visitCallInst() local
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| H A D | InstCombineCompares.cpp | 7177 unsigned ExtOpc = ExtI->getOpcode(); visitICmpInst() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86TargetTransformInfo.cpp | 3044 unsigned ExtOpc = getCastInstrCost() local
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| H A D | X86ISelLowering.cpp | 20024 SplitAndExtendv16i1(unsigned ExtOpc,MVT VT,SDValue In,const SDLoc & dl,SelectionDAG & DAG) SplitAndExtendv16i1() argument
24259 unsigned ExtOpc = LowerEXTEND_VECTOR_INREG() local
28219 unsigned ExtOpc = IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; LowerABD() local
29391 unsigned ExtOpc = Opc == ISD::SRA ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; LowerShift() local
32097 unsigned ExtOpc = IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; ReplaceNodeResults() local
46967 unsigned ExtOpc = LHS.getOpcode(); combineShiftToPMULH() local
47404 unsigned ExtOpc = IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; combineVectorPack() local
57043 ISD::NodeType ExtOpc = IsBool ? getExtendForContent(BCont) LowerAsmOperandForConstraint() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 1669 customLegalizeToWOp(SDNode * N,SelectionDAG & DAG,int NumOp,unsigned ExtOpc=ISD::ANY_EXTEND) customLegalizeToWOp() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterBankInfo.cpp | 1900 extendLow32IntoHigh32(MachineIRBuilder & B,Register Hi32Reg,Register Lo32Reg,unsigned ExtOpc,const RegisterBank & RegBank,bool IsBooleanSrc=false) extendLow32IntoHigh32() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 1543 unsigned ExtOpc = PromoteOperand() local
7069 unsigned ExtOpc = N0.getOpcode(); visitAND() local
12807 ExtendUsesToFormExtLoad(EVT VT,SDNode * N,SDValue N0,unsigned ExtOpc,SmallVectorImpl<SDNode * > & ExtendNodes,const TargetLowering & TLI) ExtendUsesToFormExtLoad() argument
13143 tryToFoldExtOfLoad(SelectionDAG & DAG,DAGCombiner & Combiner,const TargetLowering & TLI,EVT VT,bool LegalOperations,SDNode * N,SDValue N0,ISD::LoadExtType ExtLoadType,ISD::NodeType ExtOpc) tryToFoldExtOfLoad() argument
13185 tryToFoldExtOfMaskedLoad(SelectionDAG & DAG,const TargetLowering & TLI,EVT VT,bool LegalOperations,SDNode * N,SDValue N0,ISD::LoadExtType ExtLoadType,ISD::NodeType ExtOpc) tryToFoldExtOfMaskedLoad() argument
[all...] |
| H A D | LegalizeIntegerTypes.cpp | 5699 unsigned ExtOpc = ISD::ANY_EXTEND; PromoteIntRes_BUILD_VECTOR() local
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| H A D | TargetLowering.cpp | 5496 ISD::NodeType ExtOpc = LowerAsmOperandForConstraint() local
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