| /freebsd-src/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineInternal.h | 222 getLosslessTrunc(Constant * C,Type * TruncTy,unsigned ExtOp) getLosslessTrunc() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 5061 unsigned ExtOp, TruncOp; PromoteNode() local
5103 unsigned ExtOp = Node->getOpcode() == ISD::UMUL_LOHI ? ISD::ZERO_EXTEND PromoteNode() local
5119 unsigned ExtOp, TruncOp; PromoteNode() local
5174 unsigned ExtOp = ISD::FP_EXTEND; PromoteNode() local
5207 unsigned ExtOp = ISD::FP_EXTEND; PromoteNode() local
5238 unsigned ExtOp = ISD::FP_EXTEND; PromoteNode() local
[all...] |
| H A D | LegalizeVectorOps.cpp | 621 unsigned ExtOp = VecVT.isFloatingPoint() ? ISD::FP_EXTEND : ISD::ANY_EXTEND; PromoteSETCC() local
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| H A D | DAGCombiner.cpp | 17501 unsigned ExtOp = IsInputSigned && IsOutputSigned ? ISD::SIGN_EXTEND FoldIntToFPToInt() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | BasicTTIImpl.h | 2103 unsigned ExtOp = getTypeBasedIntrinsicInstrCost() local
2170 unsigned ExtOp = IsSigned ? Instruction::SExt : Instruction::ZExt; getTypeBasedIntrinsicInstrCost() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | SimplifyIndVar.cpp | 1531 Value *ExtOp = createExtendInst(Op, WideType, Cmp->isSigned(), Cmp); widenLoopCompare() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.cpp | 505 unsigned ExtOp = getBoolExtOp(getMRI()->getType(Op.getReg()).isVector(), IsFP); buildBoolExt() local
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| H A D | LegalizerHelper.cpp | 2190 auto ExtOp = MIRBuilder.buildInstr(ExtOpcode, {WideTy}, {TruncOp}); widenScalarAddSubOverflow() local
2263 unsigned ExtOp = IsSigned ? TargetOpcode::G_SEXT : TargetOpcode::G_ZEXT; widenScalarMulo() local
7761 unsigned ExtOp = IsSigned ? TargetOpcode::G_SEXT : TargetOpcode::G_ZEXT; lowerSMULH_UMULH() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCodeGenPrepare.cpp | 579 Value *ExtOp = Builder.CreateZExt(I.getOperand(0), I32Ty); promoteUniformBitreverseToI32() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonConstExtenders.cpp | 1535 MachineOperand ExtOp(EV); insertInitializer() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 1559 __anon257213e70102(unsigned ExtOp) lowerOverflowArithmetic() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | ValueTracking.cpp | 7908 unsigned ExtOp = CmpI->isSigned() ? Instruction::SExt : Instruction::ZExt; lookThroughCast() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 6341 unsigned ExtOp = Flags.isSExt() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; LowerCall_64SVR4() local
14717 ConstantSDNode *ExtOp = dyn_cast<ConstantSDNode>(Extract.getOperand(1)); combineBVOfVecSExt() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 7321 SDValue ExtOp = DAG.getNode(ExtOpcode, SDLoc(N), ExtVT, Op); combineINT_TO_FP() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 18044 SDValue ExtOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, ExtVecVT, InsertBitToMaskVector() local
41523 SDValue ExtOp = SimplifyDemandedVectorEltsForTargetNode() local
41555 SDValue ExtOp = SimplifyDemandedVectorEltsForTargetNode() local
41610 SDValue ExtOp = TLO.DAG.getNode(Opc, DL, ExtVT, Ops); SimplifyDemandedVectorEltsForTargetNode() local
55619 unsigned ExtOp = DAG.getOpcode_EXTEND_VECTOR_INREG(InOpcode); combineEXTRACT_SUBVECTOR() local
[all...] |
| /freebsd-src/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 8121 packTBLDVectorList(CodeGenFunction & CGF,ArrayRef<Value * > Ops,Value * ExtOp,Value * IndexOp,llvm::Type * ResTy,unsigned IntID,const char * Name) packTBLDVectorList() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 12799 unsigned ExtOp = VT.bitsGT(tmp.getValueType()) ? ISD::ANY_EXTEND : ISD::TRUNCATE; AddCombineBUILD_VECTORToVPADDL() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 23305 SDValue ExtOp = Src->getOperand(0); performSignExtendInRegCombine() local
[all...] |