| /llvm-project/clang/lib/CodeGen/Targets/ |
| H A D | XCore.cpp | 103 std::string Enc; member in __anona9e2efdb0111::FieldEncoding
300 SmallStringEnc Enc; in emitTargetMD() local
339 SmallStringEnc Enc; extractFieldType() local
362 appendRecordType(SmallStringEnc & Enc,const RecordType * RT,const CodeGen::CodeGenModule & CGM,TypeStringCache & TSC,const IdentifierInfo * ID) appendRecordType() argument
414 appendEnumType(SmallStringEnc & Enc,const EnumType * ET,TypeStringCache & TSC,const IdentifierInfo * ID) appendEnumType() argument
458 appendQualifier(SmallStringEnc & Enc,QualType QT) appendQualifier() argument
472 appendBuiltinType(SmallStringEnc & Enc,const BuiltinType * BT) appendBuiltinType() argument
531 appendPointerType(SmallStringEnc & Enc,const PointerType * PT,const CodeGen::CodeGenModule & CGM,TypeStringCache & TSC) appendPointerType() argument
542 appendArrayType(SmallStringEnc & Enc,QualType QT,const ArrayType * AT,const CodeGen::CodeGenModule & CGM,TypeStringCache & TSC,StringRef NoSizeEnc) appendArrayType() argument
564 appendFunctionType(SmallStringEnc & Enc,const FunctionType * FT,const CodeGen::CodeGenModule & CGM,TypeStringCache & TSC) appendFunctionType() argument
598 appendType(SmallStringEnc & Enc,QualType QType,const CodeGen::CodeGenModule & CGM,TypeStringCache & TSC) appendType() argument
632 getTypeString(SmallStringEnc & Enc,const Decl * D,const CodeGen::CodeGenModule & CGM,TypeStringCache & TSC) getTypeString() argument
[all...] |
| /llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | AMDGPUMCCodeEmitter.cpp | 431 if (!Enc || *Enc != 255) in encodeInstruction() local
502 if (Enc && *Enc != 255) { in getSDWASrcEncoding() local
534 unsigned Idx = Enc & AMDGPU::HWEncoding::REG_IDX_MASK; in getAVOperandEncoding() local
589 unsigned Enc = MRI.getEncodingValue(MO.getReg()); getMachineOpValue() local
604 unsigned Enc = MRI.getEncodingValue(MO.getReg()); getMachineOpValueT16() local
697 if (auto Enc = getLitEncoding(MO, Desc.operands()[OpNo], STI)) { getMachineOpValueCommon() local
[all...] |
| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMMCInstLower.cpp | 175 int32_t Enc = ARM_AM::getSOImmVal(MCOp.getImm()); in LowerARMMachineInstrToMCInst() local
|
| /llvm-project/llvm/include/llvm/Bitstream/ |
| H A D | BitCodes.h | 36 unsigned Enc : 3; // The encoding to use. variable
|
| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInsertWaitcnts.cpp | 1290 unsigned Enc = AMDGPU::encodeWaitcnt(IV, Wait); createNewWaitcnt() local
1529 unsigned Enc = AMDGPU::encodeLoadcntDscnt(IV, Wait); createNewWaitcnt() local
1537 unsigned Enc = AMDGPU::encodeStorecntDscnt(IV, Wait); createNewWaitcnt() local
|
| /llvm-project/clang-tools-extra/clangd/ |
| H A D | SourceCode.cpp | 105 static size_t measureUnits(llvm::StringRef U8, int Units, OffsetEncoding Enc, in measureUnits() argument
144 auto *Enc = Context::current().get(kCurrentOffsetEncoding); in lspEncoding() local
|
| H A D | Protocol.cpp | 1579 operator <<(llvm::raw_ostream & OS,OffsetEncoding Enc) operator <<() argument
|
| /llvm-project/llvm/utils/TableGen/ |
| H A D | X86FoldTablesEmitter.cpp | 487 uint8_t Enc = byteFromBitsInit(RegRec->getValueAsBitsInit("OpEncBits")); in addEntryWithFlags() local
|
| /llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 6760 uint64_t Enc = (32 - *MaybeImmed) & 0x1f; selectShiftA_32() local
6769 uint64_t Enc = 31 - *MaybeImmed; selectShiftB_32() local
6778 uint64_t Enc = (64 - *MaybeImmed) & 0x3f; selectShiftA_64() local
6787 uint64_t Enc = 63 - *MaybeImmed; selectShiftB_64() local
7609 uint64_t Enc = AArch64_AM::encodeLogicalImmediate(CstVal, 32); renderLogicalImm32() local
7618 uint64_t Enc = AArch64_AM::encodeLogicalImmediate(CstVal, 64); renderLogicalImm64() local
[all...] |
| /llvm-project/llvm/lib/CodeGen/AsmPrinter/ |
| H A D | AccelTable.cpp | 424 ID.AddInteger(Enc.Index); in Profile() local
|
| /llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 2680 uint32_t Enc = ARM_AM::getSOImmVal(~CE->getValue()); addModImmNotOperands() local
2687 uint32_t Enc = ARM_AM::getSOImmVal(-CE->getValue()); addModImmNegOperands() local
4596 insertNoDuplicates(SmallVectorImpl<std::pair<unsigned,unsigned>> & Regs,unsigned Enc,unsigned Reg) insertNoDuplicates() argument
5538 int Enc = ARM_AM::getSOImmVal(Imm1); parseModImm() local
8993 unsigned Enc = Inst.getOperand(2).getImm(); processInstruction() local
[all...] |
| /llvm-project/llvm/lib/CodeGen/MIRParser/ |
| H A D | MIParser.cpp | 2322 if (unsigned Enc = dwarf::getAttributeEncoding(Token.stringValue())) { parseDIExpression() local
|
| /llvm-project/llvm/lib/Target/AMDGPU/Utils/ |
| H A D | AMDGPUBaseInfo.cpp | 1559 unsigned Enc = 0; getDefaultCustomOperandEncoding() local
|
| /llvm-project/llvm/include/llvm/Demangle/ |
| H A D | ItaniumDemangle.h | 2860 char Enc[2]; // Encoding global() member
|
| /llvm-project/libcxxabi/src/demangle/ |
| H A D | ItaniumDemangle.h | 2861 char Enc[2]; // Encoding global() member
|
| /llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 4340 const auto Enc = VOP1 | VOP2 | VOP3 | VOPC | VOP3P | SIInstrFlags::SDWA; validateLdsDirect() local
|
| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 2153 uint64_t OldImm = Imm, NewImm, Enc; optimizeLogicalImm() local
[all...] |