/netbsd-src/external/apache2/llvm/dist/clang/lib/CodeGen/ |
H A D | CGBuilder.h | 212 CharUnits EltSize = variable 230 CharUnits EltSize = CharUnits::fromQuantity(DL.getTypeAllocSize(ElTy)); variable 245 CharUnits EltSize = variable
|
H A D | CGNonTrivialStruct.cpp | 196 CharUnits EltSize = Ctx.getTypeSizeInChars(EltTy); in visitArray() local 399 CharUnits EltSize = Ctx.getTypeSizeInChars(EltQT); in visitArray() local
|
H A D | TargetInfo.cpp | 3001 uint64_t EltSize = getContext().getTypeSize(AT->getElementType()); in classify() local 3303 unsigned EltSize = (unsigned)Context.getTypeSize(AT->getElementType()); in BitsContainNoUserData() local 3391 unsigned EltSize = TD.getTypeAllocSize(EltTy); in ContainsFloatAtOffset() local 3481 unsigned EltSize = getDataLayout().getTypeAllocSize(EltTy); in GetINTEGERTypeAtOffset() local 5345 CharUnits EltSize = TypeInfo.Width / 2; in EmitVAArg() local 8858 unsigned EltSize = getContext().getTypeSize(EltTy); in numRegsForType() local 10598 CharUnits EltSize = getContext().getTypeSizeInChars(EltTy); in detectFPCCEligibleStructHelper() local
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64TargetTransformInfo.h | 270 unsigned EltSize = DataTypeVTy->getElementType()->getScalarSizeInBits(); in isLegalNTStore() local
|
H A D | AArch64StackTagging.cpp | 272 uint32_t EltSize = DL->getTypeSizeInBits(EltTy); in flatten() local
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
H A D | Analysis.cpp | 107 uint64_t EltSize = DL.getTypeAllocSize(EltTy).getFixedValue(); in ComputeValueVTs() local 152 uint64_t EltSize = DL.getTypeAllocSize(EltTy).getFixedValue(); in computeValueLLTs() local
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64PostLegalizerLowering.cpp | 66 static bool isREVMask(ArrayRef<int> M, unsigned EltSize, unsigned NumElts, in isREVMask() 225 unsigned EltSize = Ty.getScalarSizeInBits(); in matchREV() local 922 unsigned EltSize = MRI.getType(LHS).getScalarSizeInBits(); in lowerVectorFCMP() local
|
H A D | AArch64InstructionSelector.cpp | 2331 unsigned EltSize = DstTy.getElementType().getSizeInBits(); in select() local 3630 unsigned EltSize, const TargetRegisterClass *DstRC, Register Scalar, in emitScalarToVector() 3726 const unsigned EltSize) { in getLaneCopyOpcode() 4064 getInsertVecEltOpInfo(const RegisterBank &RB, unsigned EltSize) { in getInsertVecEltOpInfo() 4662 unsigned EltSize = MRI.getType(EltReg).getSizeInBits(); in emitLaneInsert() local 4693 unsigned EltSize = EltTy.getSizeInBits(); in selectInsertElt() local 4832 unsigned EltSize = EltTy.getSizeInBits(); in selectBuildVector() local
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86ShuffleDecode.cpp | 398 void DecodeEXTRQIMask(unsigned NumElts, unsigned EltSize, int Len, int Idx, in DecodeEXTRQIMask() 435 void DecodeINSERTQIMask(unsigned NumElts, unsigned EltSize, int Len, int Idx, in DecodeINSERTQIMask()
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPULegalizerInfo.cpp | 72 const unsigned EltSize = EltTy.getSizeInBits(); in isSmallOddVector() local 121 const int EltSize = EltTy.getSizeInBits(); in moreEltsToNext32Bit() local 186 const int EltSize = EltTy.getSizeInBits(); in isRegisterVectorElementType() local 191 const int EltSize = Ty.getElementType().getSizeInBits(); in isRegisterVectorType() local 342 unsigned EltSize = EltTy.getSizeInBits(); in loadStoreBitcastWorkaround() local 1207 unsigned EltSize = EltTy.getSizeInBits(); in AMDGPULegalizerInfo() local 1231 unsigned EltSize = EltTy.getSizeInBits(); in AMDGPULegalizerInfo() local 1384 const unsigned EltSize = EltTy.getSizeInBits(); in AMDGPULegalizerInfo() local 4349 unsigned EltSize = EltTy.getSizeInBits(); in legalizeImageIntrinsic() local
|
H A D | AMDGPUTargetTransformInfo.cpp | 887 unsigned EltSize in getVectorInstrCost() local 1339 unsigned EltSize in getVectorInstrCost() local
|
H A D | SIRegisterInfo.cpp | 97 unsigned EltSize = 4; member 988 unsigned EltSize) { in getFlatScratchSpillOpcode() 1048 unsigned EltSize = (IsFlat && !IsAGPR) ? std::min(RegWidth, 16u) : 4u; in buildSpillLoadStore() local
|
H A D | AMDGPURegisterBankInfo.cpp | 1120 unsigned EltSize = EltTy.getSizeInBits(); in splitUnequalType() local 1752 int EltSize = Ty.getScalarSizeInBits(); in selectStoreIntrinsic() local 1911 unsigned EltSize = VecTy.getScalarSizeInBits(); in foldExtractEltToCmpSelect() local 1993 unsigned EltSize = VecTy.getScalarSizeInBits(); in foldInsertEltToCmpSelect() local 3577 unsigned EltSize = getSizeInBits(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping() local
|
H A D | SIInstrInfo.cpp | 290 unsigned EltSize; in getMemOperandsWithOffsetWidth() local 889 unsigned EltSize = 4; in copyPhysReg() local 1017 unsigned EltSize = 4; in materializeImmediate() local 1312 SIInstrInfo::getIndirectRegWriteMovRelPseudo(unsigned VecSize, unsigned EltSize, in getIndirectRegWriteMovRelPseudo()
|
H A D | SILoadStoreOptimizer.cpp | 100 unsigned EltSize; member
|
H A D | SIISelLowering.cpp | 5400 unsigned EltSize = EltVT.getSizeInBits(); in lowerINSERT_VECTOR_ELT() local 5489 unsigned EltSize = EltVT.getSizeInBits(); in lowerEXTRACT_VECTOR_ELT() local 10088 bool SITargetLowering::shouldExpandVectorDynExt(unsigned EltSize, in shouldExpandVectorDynExt() 10123 unsigned EltSize = EltVT.getSizeInBits(); in shouldExpandVectorDynExt() local 10188 unsigned EltSize = EltVT.getSizeInBits(); in performExtractVectorEltCombine() local
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineLoadStoreAlloca.cpp | 701 auto EltSize = DL.getTypeAllocSize(ET); in unpackLoadToAggregate() local 1224 auto EltSize = DL.getTypeAllocSize(AT->getElementType()); in unpackStoreToAggregate() local
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Analysis/ |
H A D | Loads.cpp | 279 APInt EltSize(DL.getIndexTypeSizeInBits(Ptr->getType()), in isDereferenceableAndAlignedInLoop() local
|
H A D | ConstantFolding.cpp | 476 uint64_t EltSize = DL.getTypeAllocSize(CS->getOperand(Index)->getType()); in ReadDataFromGlobal() local 515 uint64_t EltSize = DL.getTypeAllocSize(EltTy); in ReadDataFromGlobal() local
|
H A D | ModuleSummaryAnalysis.cpp | 518 uint64_t EltSize = DL.getTypeAllocSize(EltTy); in findFuncPointers() local
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
H A D | PPCTargetTransformInfo.cpp | 1067 unsigned EltSize = Val->getScalarSizeInBits(); in getVectorInstrCost() local
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 4110 unsigned EltSize = MemIntr->getMemoryVT().getSizeInBits(); in matchVPTERNLOG() local 5734 unsigned EltSize = ValueSVT.getSizeInBits(); in Select() local 5830 unsigned EltSize = ValueSVT.getSizeInBits(); in Select() local
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
H A D | ARMTargetTransformInfo.cpp | 1505 unsigned EltSize = VTy->getScalarSizeInBits(); in getGatherScatterOpCost() local
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/IPO/ |
H A D | GlobalOpt.cpp | 568 uint64_t EltSize = DL.getTypeAllocSize(ElTy); in SRAGlobal() local
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
H A D | LegalizerHelper.cpp | 57 unsigned EltSize = OrigTy.getScalarSizeInBits(); in getNarrowTypeBreakDown() local 174 unsigned EltSize = MainTy.getScalarSizeInBits(); in extractParts() local 3271 unsigned EltSize = EltTy.getSizeInBits() / 8; // FIXME: should be ABI size. in getVectorElementPointer() local
|