Searched defs:Elt1 (Results 1 – 6 of 6) sorted by relevance
| /llvm-project/llvm/lib/Target/DirectX/ |
| H A D | DXILIntrinsicExpansion.cpp | 89 Value *Elt1 = Builder.CreateExtractElement(B, (uint64_t)0); expandIntegerDot() local
|
| /llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerCombiner.cpp | 120 auto Elt1 = B.buildExtractVectorElement(Ty, Src, B.buildConstant(s64, 1)); in applyExtractVecEltPairwiseAdd() local
|
| /llvm-project/llvm/unittests/IR/ |
| H A D | IRBuilderTest.cpp | 1137 auto Elt1 = Builder.getInt64(-1); TEST_F() local
|
| /llvm-project/llvm/lib/IR/ |
| H A D | AutoUpgrade.cpp | 2449 Value *Elt1 = Builder.CreateExtractElement(CI->getArgOperand(1), upgradeX86IntrinsicCall() local
|
| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 7427 SDValue Elt1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, EltVT, lowerVECTOR_SHUFFLE() local
13419 SDValue Elt1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, ResVT, performExtractVectorEltCombine() local
|
| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 19936 SDValue Elt0 = N->getOperand(0), Elt1 = N->getOperand(1), performBuildVectorCombine() local
19992 SDValue Elt0 = N->getOperand(0), Elt1 = N->getOperand(1); performBuildVectorCombine() local
20035 SDValue Elt0 = N->getOperand(0), Elt1 = N->getOperand(1); performBuildVectorCombine() local
[all...] |