| /llvm-project/llvm/lib/Target/DirectX/ |
| H A D | DXILIntrinsicExpansion.cpp | 88 Value *Elt0 = Builder.CreateExtractElement(A, (uint64_t)0); expandIntegerDot() local
|
| /llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerCombiner.cpp | 119 auto Elt0 = B.buildExtractVectorElement(Ty, Src, B.buildConstant(s64, 0)); in applyExtractVecEltPairwiseAdd() local
|
| /llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LegalizationArtifactCombiner.h | 960 Register Elt0 = MI.getSourceReg(0); tryCombineMergeLike() local
|
| /llvm-project/llvm/lib/IR/ |
| H A D | AutoUpgrade.cpp | 2334 Value *Elt0 = Builder.CreateExtractElement(Vec, (uint64_t)0); upgradeX86IntrinsicCall() local
2447 Value *Elt0 = Builder.CreateExtractElement(CI->getArgOperand(0), upgradeX86IntrinsicCall() local
[all...] |
| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 7423 SDValue Elt0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, EltVT, lowerVECTOR_SHUFFLE() local
9215 SDValue Elt0 = Ops.pop_back_val(); LowerINTRINSIC_W_CHAIN() local
13417 SDValue Elt0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, ResVT, performExtractVectorEltCombine() local
|
| H A D | AMDGPUISelLowering.cpp | 4157 SDValue Elt0 = Vec.getOperand(0); performTruncateCombine() local
|
| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 12278 size_t Elt0 = *FirstRealEltIter - FirstRealIndex; isWideDUPMask() local
19936 SDValue Elt0 = N->getOperand(0), Elt1 = N->getOperand(1), performBuildVectorCombine() local
19992 SDValue Elt0 = N->getOperand(0), Elt1 = N->getOperand(1); performBuildVectorCombine() local
20035 SDValue Elt0 = N->getOperand(0), Elt1 = N->getOperand(1); performBuildVectorCombine() local
[all...] |
| /llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 8749 SDValue Elt0 = DAG.getNode(RISCVISD::VMV_X_S, DL, XLenVT, Vec); lowerEXTRACT_VECTOR_ELT() local
|