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Searched defs:DstVT (Results 1 – 22 of 22) sorted by relevance

/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FastISel.cpp699 bool X86FastISel::X86FastEmitExtend(ISD::NodeType Opc, EVT DstVT, in X86FastEmitExtend() argument
1244 EVT DstVT = VA.getValVT(); X86SelectRet() local
1533 EVT DstVT = TLI.getValueType(DL, I->getType()); X86SelectZExt() local
1591 EVT DstVT = TLI.getValueType(DL, I->getType()); X86SelectSExt() local
2432 MVT DstVT = TLI.getValueType(DL, I->getType()).getSimpleVT(); X86SelectIntToFP() local
2514 EVT DstVT = TLI.getValueType(DL, I->getType()); X86SelectTrunc() local
3679 EVT DstVT = TLI.getValueType(DL, I->getType()); fastSelectInstruction() local
3694 MVT SrcVT, DstVT; fastSelectInstruction() local
[all...]
H A DX86SelectionDAGInfo.cpp249 EVT DstVT = Dst.getValueType(); emitConstantSizeRepmov() local
H A DX86ISelLowering.cpp4131 __anon973982070d02(SDValue Op, MVT OpVT, MVT DstVT) getAVX512Node() argument
4155 MVT DstVT = VT; getAVX512Node() local
9917 matchShuffleAsVTRUNC(MVT & SrcVT,MVT & DstVT,MVT VT,ArrayRef<int> Mask,const APInt & Zeroable,const X86Subtarget & Subtarget) matchShuffleAsVTRUNC() argument
9955 getAVX512TruncNode(const SDLoc & DL,MVT DstVT,SDValue Src,const X86Subtarget & Subtarget,SelectionDAG & DAG,bool ZeroUppers) getAVX512TruncNode() argument
10325 MVT DstVT = MVT::getVectorVT(DstSVT, NumSrcElts * 2); lowerShuffleWithPACK() local
19246 BuildFILD(EVT DstVT,EVT SrcVT,const SDLoc & DL,SDValue Chain,SDValue Pointer,MachinePointerInfo PtrInfo,Align Alignment,SelectionDAG & DAG) const BuildFILD() argument
19655 MVT DstVT = Op->getSimpleValueType(0); LowerUINT_TO_FP() local
20112 truncateVectorWithPACK(unsigned Opcode,EVT DstVT,SDValue In,const SDLoc & DL,SelectionDAG & DAG,const X86Subtarget & Subtarget) truncateVectorWithPACK() argument
20234 truncateVectorWithPACKUS(EVT DstVT,SDValue In,const SDLoc & DL,const X86Subtarget & Subtarget,SelectionDAG & DAG) truncateVectorWithPACKUS() argument
20242 truncateVectorWithPACKSS(EVT DstVT,SDValue In,const SDLoc & DL,const X86Subtarget & Subtarget,SelectionDAG & DAG) truncateVectorWithPACKSS() argument
20254 matchTruncateWithPACK(unsigned & PackOpcode,EVT DstVT,SDValue In,const SDLoc & DL,SelectionDAG & DAG,const X86Subtarget & Subtarget) matchTruncateWithPACK() argument
20344 LowerTruncateVecPackWithSignBits(MVT DstVT,SDValue In,const SDLoc & DL,const X86Subtarget & Subtarget,SelectionDAG & DAG) LowerTruncateVecPackWithSignBits() argument
20378 LowerTruncateVecPack(MVT DstVT,SDValue In,const SDLoc & DL,const X86Subtarget & Subtarget,SelectionDAG & DAG) LowerTruncateVecPack() argument
21047 EVT DstVT = N->getValueType(0); LRINT_LLRINTHelper() local
21105 EVT DstVT = Node->getValueType(0); LowerFP_TO_INT_SAT() local
30802 MVT DstVT = Op.getSimpleValueType(); LowerBITCAST() local
31734 MVT DstVT = Op.getSimpleValueType(); LowerADDRSPACECAST() local
32995 EVT DstVT = N->getValueType(0); ReplaceNodeResults() local
37076 matchUnaryShuffle(MVT MaskVT,ArrayRef<int> Mask,bool AllowFloatDomain,bool AllowIntDomain,SDValue V1,const SelectionDAG & DAG,const X86Subtarget & Subtarget,unsigned & Shuffle,MVT & SrcVT,MVT & DstVT) matchUnaryShuffle() argument
37379 matchBinaryShuffle(MVT MaskVT,ArrayRef<int> Mask,bool AllowFloatDomain,bool AllowIntDomain,SDValue & V1,SDValue & V2,const SDLoc & DL,SelectionDAG & DAG,const X86Subtarget & Subtarget,unsigned & Shuffle,MVT & SrcVT,MVT & DstVT,bool IsUnary) matchBinaryShuffle() argument
42679 EVT DstVT = N->getValueType(0); combineCastedMaskArithmetic() local
48194 MVT DstVT = N0.getSimpleValueType(); combineBitOpWithPACK() local
50539 MVT DstVT = Trunc.getSimpleValueType(); combineStore() local
52356 EVT DstVT = N->getValueType(0); combineSextInRegCmov() local
53579 EVT DstVT = combineUIntToFP() local
53598 EVT DstVT = InVT.changeVectorElementType(MVT::i32); combineUIntToFP() local
53649 EVT DstVT = combineSIntToFP() local
53668 EVT DstVT = InVT.changeVectorElementType(MVT::i32); combineSIntToFP() local
[all...]
H A DX86ISelDAGToDAG.cpp1346 MVT DstVT = N->getSimpleValueType(0); PreprocessISelDAG() local
1402 MVT DstVT = N->getSimpleValueType(0); PreprocessISelDAG() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DFastISel.cpp1458 EVT DstVT = TLI.getValueType(DL, I->getType()); selectCast() local
1496 MVT DstVT = DstEVT.getSimpleVT(); selectBitCast() local
1863 EVT DstVT = TLI.getValueType(DL, I->getType()); selectOperator() local
[all...]
H A DTargetLowering.cpp692 EVT DstVT = Op.getValueType(); SimplifyMultipleUseDemandedBits() local
843 EVT DstVT = Op.getValueType(); SimplifyMultipleUseDemandedBits() local
8034 EVT DstVT = Node->getValueType(0); expandFP_TO_SINT() local
8108 EVT DstVT = Node->getValueType(0); expandFP_TO_UINT() local
8213 EVT DstVT = Node->getValueType(0); expandUINT_TO_FP() local
9294 EVT DstVT = LD->getValueType(0); scalarizeVectorLoad() local
10711 EVT DstVT = Node->getValueType(0); expandFP_TO_INT_SAT() local
[all...]
H A DLegalizeVectorTypes.cpp597 EVT DstVT = N->getValueType(0).getVectorElementType(); ScalarizeVecRes_FP_TO_XINT_SAT() local
6309 EVT DstVT = N->getValueType(0); WidenVecOp_FP_TO_XINT_SAT() local
H A DLegalizeDAG.cpp3241 EVT DstVT = Node->getValueType(0); ExpandNode() local
H A DLegalizeIntegerTypes.cpp5399 EVT DstVT = N->getValueType(0); ExpandIntOp_XINT_TO_FP() local
H A DDAGCombiner.cpp3716 if (DstVT == SrcVT) in getTruncatedUSUBSAT() argument
3744 foldSubToUSubSat(EVT DstVT,SDNode * N) foldSubToUSubSat() argument
12889 EVT DstVT = N->getValueType(0); CombineExtLoad() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp1063 MVT DstVT; in SelectIToFP() local
1188 MVT DstVT, SrcVT; in SelectFPToI() local
[all...]
H A DPPCISelLowering.cpp8310 EVT DstVT = Op.getValueType(); LowerFP_TO_INT() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMFastISel.cpp1528 MVT DstVT; in SelectIToFP() local
1573 MVT DstVT; in SelectFPToI() local
H A DARMISelLowering.cpp6187 EVT DstVT = BC->getValueType(0); CombineVMOVDRRCandidateWithVecOp() local
6241 EVT DstVT = N->getValueType(0); ExpandBITCAST() local
18551 EVT DstVT = N->getValueType(0); PerformBITCASTCombine() local
20900 MVT DstVT = (Sz == 16 ? MVT::f32 : MVT::f64); LowerFP_EXTEND() local
20926 EVT DstVT = Op.getValueType(); LowerFP_ROUND() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp1093 MVT DstVT, SrcVT; in selectFPToInt() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp2708 truncateVectorWithNARROW(EVT DstVT,SDValue In,const SDLoc & DL,SelectionDAG & DAG) truncateVectorWithNARROW() argument
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.cpp2652 auto DstVT = TLI->getValueType(DL, Dst); getExtractWithExtendCost() local
H A DAArch64ISelDAGToDAG.cpp1468 EVT DstVT = N->getValueType(0); tryIndexedLoad() local
H A DAArch64ISelLowering.cpp4131 EVT DstVT = Op.getValueType(); LowerVectorFP_TO_INT_SAT() local
4203 EVT DstVT = Op.getValueType(); LowerFP_TO_INT_SAT() local
21474 isHalvingTruncateOfLegalScalableType(EVT SrcVT,EVT DstVT) isHalvingTruncateOfLegalScalableType() argument
23399 EVT DstVT = N->getValueType(0); performSignExtendInRegCombine() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp2740 MVT DstVT = Op.getSimpleValueType(); lowerFP_TO_INT_SAT() local
5398 MVT DstVT = VT0.changeVectorElementTypeToInteger(); LowerIS_FPCLASS() local
10633 MVT DstVT = Op.getSimpleValueType(); lowerVPFPIntConvOp() local
13953 EVT DstVT = N->getValueType(0); performFP_TO_INT_SATCombine() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/
H A DCodeGenPrepare.cpp1474 if (SrcVT.isInteger() != DstVT.isInteger()) in OptimizeNoopCopyExpression() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp4044 EVT DstVT = Op.getValueType(); lowerFP_EXTEND() local