| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| H A D | AVRExpandPseudoInsts.cpp | 69 Register DstReg) { in buildMI()
145 Register DstReg = MI.getOperand(0).getReg(); in expandArith() local
178 Register DstReg = MI.getOperand(0).getReg(); in expandLogic() local
225 Register DstReg = MI.getOperand(0).getReg(); in expandLogicImm() local
277 Register DstReg = MI.getOperand(0).getReg(); in expand() local
329 Register DstReg = MI.getOperand(0).getReg(); in expand() local
392 Register DstReg = MI.getOperand(0).getReg(); in expand() local
422 Register DstReg = MI.getOperand(0).getReg(); in expand() local
460 Register DstReg = MI.getOperand(0).getReg(); in expand() local
493 Register DstReg = MI.getOperand(0).getReg(); in expand() local
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| H A D | AVRRegisterInfo.cpp | 102 Register DstReg) { in foldFrameOffset()
165 Register DstReg = MI.getOperand(0).getReg(); in eliminateFrameIndex() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonPeephole.cpp | 139 Register DstReg = Dst.getReg(); in runOnMachineFunction() local
159 Register DstReg = Dst.getReg(); in runOnMachineFunction() local
176 Register DstReg = Dst.getReg(); in runOnMachineFunction() local
187 Register DstReg = Dst.getReg(); in runOnMachineFunction() local
209 Register DstReg = Dst.getReg(); in runOnMachineFunction() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ExpandPseudoInsts.cpp | 122 Register DstReg = MI.getOperand(0).getReg(); in expandMOVImm() local
166 Register DstReg = MI.getOperand(0).getReg(); in expandMOVImm() local
404 unsigned DstReg = MI.getOperand(0).getReg(); in expand_DestructiveOp() local
782 Register DstReg = MI.getOperand(0).getReg(); in expandMI() local
901 Register DstReg = MI.getOperand(0).getReg(); in expandMI() local
936 unsigned DstReg = MI.getOperand(0).getReg(); in expandMI() local
978 Register DstReg = MI.getOperand(0).getReg(); in expandMI() local
999 Register DstReg = MI.getOperand(0).getReg(); in expandMI() local
1043 Register DstReg = MI.getOperand(0).getReg(); in expandMI() local
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| H A D | AArch64RedundantCopyElimination.cpp | 186 MCPhysReg DstReg = PredI.getOperand(0).getReg(); in knownRegValInBlock() local
252 MCPhysReg DstReg = PredI.getOperand(0).getReg(); in knownRegValInBlock() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86InstructionSelector.cpp | 234 Register DstReg = I.getOperand(0).getReg(); in selectCopy() local
692 MachineInstr &I, MachineRegisterInfo &MRI, const unsigned DstReg, in selectTurnIntoCOPY()
713 const Register DstReg = I.getOperand(0).getReg(); in selectTruncOrPtrToInt() local
777 const Register DstReg = I.getOperand(0).getReg(); in selectZext() local
842 const Register DstReg = I.getOperand(0).getReg(); in selectAnyext() local
1039 const Register DstReg = I.getOperand(0).getReg(); in selectUadde() local
1099 const Register DstReg = I.getOperand(0).getReg(); in selectExtract() local
1150 bool X86InstructionSelector::emitExtractSubreg(unsigned DstReg, unsigned SrcReg, in emitExtractSubreg()
1188 bool X86InstructionSelector::emitInsertSubreg(unsigned DstReg, unsigned SrcReg, in emitInsertSubreg()
1231 const Register DstReg = I.getOperand(0).getReg(); in selectInsert() local
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| H A D | X86LowerTileCopy.cpp | 86 Register DstReg = DstMO.getReg(); in runOnMachineFunction() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LegalizationArtifactCombiner.h | 57 Register DstReg = MI.getOperand(0).getReg(); in tryCombineAnyExt() local
106 Register DstReg = MI.getOperand(0).getReg(); in tryCombineZExt() local
165 Register DstReg = MI.getOperand(0).getReg(); in tryCombineSExt() local
222 Register DstReg = MI.getOperand(0).getReg(); in tryCombineTrunc() local
327 Register DstReg = MI.getOperand(0).getReg(); in tryFoldImplicitDef() local
499 static void replaceRegOrBuildCopy(Register DstReg, Register SrcReg, in replaceRegOrBuildCopy()
719 Register DstReg = MI.getOperand(Idx).getReg(); in tryCombineUnmergeValues() local
763 Register DstReg = MI.getOperand(0).getReg(); in tryCombineExtract() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | TwoAddressInstructionPass.cpp | 268 Register &SrcReg, Register &DstReg, bool &IsSrcPhys, in isCopyToReg()
349 Register SrcReg, DstReg; in isKilled() local
360 static bool isTwoAddrUse(MachineInstr &MI, Register Reg, Register &DstReg) { in isTwoAddrUse()
379 bool &IsCopy, Register &DstReg, bool &IsDstPhys) { in findOnlyInterestingUse()
634 void TwoAddressInstructionPass::scanUses(Register DstReg) { in scanUses()
695 Register SrcReg, DstReg; in processCopy() local
755 Register DstReg; in rescheduleMIBelowKill() local
939 Register DstReg; in rescheduleKillAboveMI() local
1330 Register DstReg = DstMO.getReg(); in collectTiedOperands() local
1596 Register DstReg = mi->getOperand(DstIdx).getReg(); in runOnMachineFunction() local
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| H A D | OptimizePHIs.cpp | 101 Register DstReg = MI->getOperand(0).getReg(); in IsSingleValuePHICycle() local
145 Register DstReg = MI->getOperand(0).getReg(); in IsDeadPHICycle() local
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| H A D | RegisterCoalescer.h | 33 Register DstReg; variable
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
| H A D | BPFMISimplifyPatchable.cpp | 161 Register &DstReg, const GlobalValue *GVal, bool IsAma) { in processCandidate()
195 Register &DstReg, Register &SrcReg, const GlobalValue *GVal, in processDstReg()
270 Register DstReg = MI.getOperand(0).getReg(); in removeLD() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| H A D | InstructionSelect.cpp | 169 Register DstReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
222 Register DstReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
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| H A D | LegalizerHelper.cpp | 199 void LegalizerHelper::insertParts(Register DstReg, in insertParts()
369 void LegalizerHelper::buildWidenedRemergeToDst(Register DstReg, LLT LCMTy, in buildWidenedRemergeToDst()
790 Register DstReg = MI.getOperand(0).getReg(); in narrowScalar() local
898 Register DstReg = MI.getOperand(0).getReg(); in narrowScalar() local
916 Register DstReg = MI.getOperand(0).getReg(); in narrowScalar() local
1183 Register DstReg = MI.getOperand(0).getReg(); in narrowScalar() local
1342 Register DstReg = MI.getOperand(0).getReg(); in widenScalarMergeValues() local
1624 Register DstReg = MI.getOperand(0).getReg(); in widenScalarExtract() local
1802 Register DstReg = MI.getOperand(0).getReg(); in widenScalarAddSubShlSat() local
1961 Register DstReg = MI.getOperand(0).getReg(); in widenScalar() local
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| H A D | CombinerHelper.cpp | 154 Register DstReg = MI.getOperand(0).getReg(); in matchCombineCopy() local
159 Register DstReg = MI.getOperand(0).getReg(); in applyCombineCopy() local
224 Register DstReg = MI.getOperand(0).getReg(); in applyCombineConcatVectors() local
329 Register DstReg = MI.getOperand(0).getReg(); in applyCombineShuffleVector() local
1637 Register DstReg = MI.getOperand(0).getReg(); in matchCombineConstantFoldFpUnary() local
1650 Register DstReg = MI.getOperand(0).getReg(); in applyCombineConstantFoldFpUnary() local
2023 Register DstReg = MI.getOperand(Idx).getReg(); in applyCombineUnmergeMergeToPlainValues() local
2068 Register DstReg = MI.getOperand(Idx).getReg(); in applyCombineUnmergeConstant() local
2197 Register DstReg = MI.getOperand(0).getReg(); in applyCombineShiftToUnmerge() local
2282 Register DstReg = MI.getOperand(0).getReg(); in matchCombineI2PToP2I() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | R600ExpandSpecialInstrs.cpp | 126 Register DstReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
196 Register DstReg = in runOnMachineFunction() local
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| H A D | SILowerI1Copies.cpp | 504 Register DstReg = MI.getOperand(0).getReg(); in lowerCopiesFromI1() local
564 Register DstReg = MI->getOperand(0).getReg(); in lowerPhis() local
675 Register DstReg = MI.getOperand(0).getReg(); in lowerCopiesToI1() local
809 const DebugLoc &DL, unsigned DstReg, in buildMergeLaneMasks()
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| H A D | AMDGPUInstructionSelector.cpp | 122 Register DstReg = Dst.getReg(); in selectCOPY() local
238 Register DstReg = MRI->createVirtualRegister(&SubRC); in getSubOperand64() local
280 Register DstReg = I.getOperand(0).getReg(); in selectG_AND_OR_XOR() local
303 Register DstReg = I.getOperand(0).getReg(); in selectG_ADD_SUB() local
460 Register DstReg = I.getOperand(0).getReg(); in selectG_EXTRACT() local
505 Register DstReg = MI.getOperand(0).getReg(); in selectG_MERGE_VALUES() local
702 Register DstReg = I.getOperand(0).getReg(); in selectG_INSERT() local
914 Register DstReg = I.getOperand(0).getReg(); in selectG_INTRINSIC() local
1101 Register DstReg = I.getOperand(0).getReg(); in selectBallot() local
1131 Register DstReg = I.getOperand(0).getReg(); in selectRelocConstant() local
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| H A D | AMDGPURegisterBankInfo.cpp | 122 Register DstReg = MI.getOperand(0).getReg(); in applyBank() local
149 Register DstReg = MI.getOperand(0).getReg(); in applyBank() local
1142 Register DstReg = MI.getOperand(0).getReg(); in applyMappingLoad() local
1542 Register DstReg = MI.getOperand(0).getReg(); in applyMappingBFEIntrinsic() local
1818 bool AMDGPURegisterBankInfo::buildVCopy(MachineIRBuilder &B, Register DstReg, in buildVCopy()
1969 Register DstReg = (NumLanes == 1) ? MI.getOperand(0).getReg() : DstRegs[L]; in foldExtractEltToCmpSelect() local
2075 Register DstReg = MI.getOperand(0).getReg(); in applyMappingImpl() local
2131 Register DstReg = MI.getOperand(BoolDstOp).getReg(); in applyMappingImpl() local
2167 Register DstReg = MI.getOperand(0).getReg(); in applyMappingImpl() local
2248 Register DstReg = MI.getOperand(0).getReg(); in applyMappingImpl() local
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| H A D | SIFixSGPRCopies.cpp | 144 Register DstReg = Copy.getOperand(0).getReg(); in getCopyRegClasses() local
180 Register DstReg = MI.getOperand(0).getReg(); in tryChangeVGPRtoSGPRinCopy() local
222 Register DstReg = MI.getOperand(0).getReg(); in foldVGPRCopyIntoRegSequence() local
587 Register DstReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 775 const Register DstReg = I.getOperand(0).getReg(); in isValidCopy() local
833 Register DstReg = I.getOperand(0).getReg(); in getRegClassesForCopy() local
858 Register DstReg = I.getOperand(0).getReg(); in selectCopy() local
1666 Register DstReg = I.getOperand(0).getReg(); in selectVectorSHL() local
1712 Register DstReg = I.getOperand(0).getReg(); in selectVectorAshrLshr() local
1814 Register DstReg = ForceDstReg in materializeLargeCMVal() local
1830 Register DstReg = BuildMovK(MovZ.getReg(0), in materializeLargeCMVal() local
1893 Register DstReg = I.getOperand(0).getReg(); in preISelLower() local
1949 Register DstReg = I.getOperand(0).getReg(); in convertPtrAddToAdd() local
2310 Register DstReg = I.getOperand(0).getReg(); in select() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCDuplexInfo.cpp | 190 unsigned DstReg, PredReg, SrcReg, Src1Reg, Src2Reg; in getDuplexCandidateGroup() local
540 unsigned DstReg, SrcReg; in subInstWouldBeExtended() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsSEInstrInfo.cpp | 746 Register DstReg = I->getOperand(0).getReg(); in expandPseudoMTLoHi() local
763 unsigned DstReg = Dst.getReg(), SrcReg = Src.getReg(), TmpReg = DstReg; in expandCvtFPInt() local
785 Register DstReg = I->getOperand(0).getReg(); in expandExtractElementF64() local
827 Register DstReg = I->getOperand(0).getReg(); in expandBuildPairF64() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZCopyPhysRegs.cpp | 87 Register DstReg = MI->getOperand(0).getReg(); in visitMBB() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVExpandPseudoInsts.cpp | 258 Register DstReg = MBBI->getOperand(0).getReg(); in expandVSetVL() local
273 Register DstReg = MBBI->getOperand(0).getReg(); in expandVMSET_VMCLR() local
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