Searched defs:DstR (Results 1 – 7 of 7) sorted by relevance
46 RegisterRef DstR = DFG.makeRegRef(Dst.getReg(), Dst.getSubReg()); in interpretAsCopy() local
113 auto mapRegs = [&EM] (RegisterRef DstR, RegisterRef SrcR) -> void { in INITIALIZE_PASS_DEPENDENCY()
1756 Register DstR = MI->getOperand(0).getReg(); in expandCopy() local1814 Register DstR = MI->getOperand(0).getReg(); in expandLoadInt() local1881 Register DstR = MI->getOperand(0).getReg(); in expandLoadVecPred() local1984 Register DstR = MI->getOperand(0).getReg(); in expandLoadVec2() local2062 Register DstR = MI->getOperand(0).getReg(); in expandLoadVec() local2506 Register DstR = MI.getOperand(0).getReg(); in optimizeSpillSlots() local
1002 Register DstR = MI->getOperand(0).getReg(); in splitInstr() local
626 unsigned DstR, unsigned DstSR, const MachineOperand &PredOp, in genCondTfrFor()
684 bool HexagonGenInsert::isValidInsertForm(unsigned DstR, unsigned SrcR, in isValidInsertForm()
514 const Register DstR = Dst.getReg(); in processInstructionForSlowLEA() local