| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | RegisterCoalescer.h | 39 unsigned DstIdx = 0; variable
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| H A D | TwoAddressInstructionPass.cpp | 538 unsigned DstIdx, in commuteInstruction()
1127 unsigned SrcIdx, unsigned DstIdx, in tryInstructionTransform()
1323 unsigned DstIdx = 0; in collectTiedOperands() local
1372 unsigned DstIdx = TP.second; in processTiedPairs() local
1594 unsigned DstIdx = TiedPairs[0].second; in runOnMachineFunction() local
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| H A D | RegisterCoalescer.cpp | 1266 unsigned DstIdx = CP.isFlipped() ? CP.getSrcIdx() : CP.getDstIdx(); in reMaterializeTrivialDef() local
1884 unsigned DstIdx = CP.getDstIdx(); in joinCopy() local
3490 unsigned DstIdx = CP.getDstIdx(); in joinVirtRegs() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | R600ExpandSpecialInstrs.cpp | 86 int DstIdx = TII->getOperandIdx(MI.getOpcode(), R600::OpName::dst); in runOnMachineFunction() local
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| H A D | R600Packetizer.cpp | 84 int DstIdx = TII->getOperandIdx(BI->getOpcode(), R600::OpName::dst); in getPreviousVector() local
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| H A D | SIPeepholeSDWA.cpp | 377 auto DstIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), in convertToSDWA() local
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| H A D | R600ISelLowering.cpp | 276 int DstIdx = TII->getOperandIdx(MI.getOpcode(), R600::OpName::dst); in EmitInstrWithCustomInserter() local
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| H A D | SIInstrInfo.cpp | 3843 int DstIdx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::vdst); in verifyInstruction() local
3948 const uint32_t DstIdx = in verifyInstruction() local
4296 int DstIdx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::vdst); in verifyInstruction() local
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| H A D | SIISelLowering.cpp | 11278 int DstIdx = in AddIMGInit() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| H A D | GISelKnownBits.cpp | 478 unsigned DstIdx = 0; in computeKnownBitsImpl() local
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| H A D | LegalizerHelper.cpp | 4670 unsigned DstIdx = 0; // Low bits of the result. in multiplyRegisters() local
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| /netbsd-src/external/apache2/llvm/dist/clang/lib/CodeGen/ |
| H A D | CGNonTrivialStruct.cpp | 33 enum { DstIdx = 0, SrcIdx = 1 }; enumerator
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/Disassembler/ |
| H A D | AMDGPUDisassembler.cpp | 301 int DstIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vdst); in decodeOperand_AVLdSt_Any() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 2116 unsigned DstIdx = (Imm >> 4) & 3; in commuteInstructionImpl() local
5422 unsigned DstIdx = (Imm >> 4) & 3; in foldMemoryOperandCustom() local
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| H A D | X86ISelLowering.cpp | 7680 unsigned DstIdx = 0; in getFauxShuffleMask() local
37858 unsigned DstIdx = (InsertPSMask >> 4) & 0x3; in combineTargetShuffle() local
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 3327 const int DstIdx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::vdst); in validateEarlyClobberLimitations() local
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