/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.h | 702 buildPtrToInt(const DstOp & Dst,const SrcOp & Src) buildPtrToInt() argument 707 buildIntToPtr(const DstOp & Dst,const SrcOp & Src) buildIntToPtr() argument 712 buildBitcast(const DstOp & Dst,const SrcOp & Src) buildBitcast() argument 717 buildAddrSpaceCast(const DstOp & Dst,const SrcOp & Src) buildAddrSpaceCast() argument 1620 buildFreeze(const DstOp & Dst,const SrcOp & Src) buildFreeze() argument 1762 buildAnd(const DstOp & Dst,const SrcOp & Src0,const SrcOp & Src1) buildAnd() argument 1784 buildXor(const DstOp & Dst,const SrcOp & Src0,const SrcOp & Src1) buildXor() argument 1792 buildNot(const DstOp & Dst,const SrcOp & Src0) buildNot() argument 1800 buildNeg(const DstOp & Dst,const SrcOp & Src0) buildNeg() argument 1806 buildCTPOP(const DstOp & Dst,const SrcOp & Src0) buildCTPOP() argument 1811 buildCTLZ(const DstOp & Dst,const SrcOp & Src0) buildCTLZ() argument 1816 buildCTLZ_ZERO_UNDEF(const DstOp & Dst,const SrcOp & Src0) buildCTLZ_ZERO_UNDEF() argument 1821 buildCTTZ(const DstOp & Dst,const SrcOp & Src0) buildCTTZ() argument 1826 buildCTTZ_ZERO_UNDEF(const DstOp & Dst,const SrcOp & Src0) buildCTTZ_ZERO_UNDEF() argument 1831 buildBSwap(const DstOp & Dst,const SrcOp & Src0) buildBSwap() argument 1950 buildFCopysign(const DstOp & Dst,const SrcOp & Src0,const SrcOp & Src1) buildFCopysign() argument 1956 buildUITOFP(const DstOp & Dst,const SrcOp & Src0) buildUITOFP() argument 1961 buildSITOFP(const DstOp & Dst,const SrcOp & Src0) buildSITOFP() argument 1966 buildFPTOUI(const DstOp & Dst,const SrcOp & Src0) buildFPTOUI() argument 1971 buildFPTOSI(const DstOp & Dst,const SrcOp & Src0) buildFPTOSI() argument 1984 buildSMin(const DstOp & Dst,const SrcOp & Src0,const SrcOp & Src1) buildSMin() argument 1990 buildSMax(const DstOp & Dst,const SrcOp & Src0,const SrcOp & Src1) buildSMax() argument 1996 buildUMin(const DstOp & Dst,const SrcOp & Src0,const SrcOp & Src1) buildUMin() argument 2002 buildUMax(const DstOp & Dst,const SrcOp & Src0,const SrcOp & Src1) buildUMax() argument 2008 buildAbs(const DstOp & Dst,const SrcOp & Src) buildAbs() argument 2024 buildVecReduceSeqFAdd(const DstOp & Dst,const SrcOp & ScalarIn,const SrcOp & VecIn) buildVecReduceSeqFAdd() argument 2035 buildVecReduceSeqFMul(const DstOp & Dst,const SrcOp & ScalarIn,const SrcOp & VecIn) buildVecReduceSeqFMul() argument 2046 buildVecReduceFAdd(const DstOp & Dst,const SrcOp & ScalarIn,const SrcOp & VecIn) buildVecReduceFAdd() argument 2056 buildVecReduceFMul(const DstOp & Dst,const SrcOp & ScalarIn,const SrcOp & VecIn) buildVecReduceFMul() argument 2063 buildVecReduceFMax(const DstOp & Dst,const SrcOp & Src) buildVecReduceFMax() argument 2068 buildVecReduceFMin(const DstOp & Dst,const SrcOp & Src) buildVecReduceFMin() argument 2073 buildVecReduceFMaximum(const DstOp & Dst,const SrcOp & Src) buildVecReduceFMaximum() argument 2079 buildVecReduceFMinimum(const DstOp & Dst,const SrcOp & Src) buildVecReduceFMinimum() argument 2085 buildVecReduceAdd(const DstOp & Dst,const SrcOp & Src) buildVecReduceAdd() argument 2090 buildVecReduceMul(const DstOp & Dst,const SrcOp & Src) buildVecReduceMul() argument 2095 buildVecReduceAnd(const DstOp & Dst,const SrcOp & Src) buildVecReduceAnd() argument 2100 buildVecReduceOr(const DstOp & Dst,const SrcOp & Src) buildVecReduceOr() argument 2105 buildVecReduceXor(const DstOp & Dst,const SrcOp & Src) buildVecReduceXor() argument 2110 buildVecReduceSMax(const DstOp & Dst,const SrcOp & Src) buildVecReduceSMax() argument 2115 buildVecReduceSMin(const DstOp & Dst,const SrcOp & Src) buildVecReduceSMin() argument 2120 buildVecReduceUMax(const DstOp & Dst,const SrcOp & Src) buildVecReduceUMax() argument 2125 buildVecReduceUMin(const DstOp & Dst,const SrcOp & Src) buildVecReduceUMin() argument 2155 buildSbfx(const DstOp & Dst,const SrcOp & Src,const SrcOp & LSB,const SrcOp & Width) buildSbfx() argument 2161 buildUbfx(const DstOp & Dst,const SrcOp & Src,const SrcOp & LSB,const SrcOp & Width) buildUbfx() argument 2167 buildRotateRight(const DstOp & Dst,const SrcOp & Src,const SrcOp & Amt) buildRotateRight() argument 2173 buildRotateLeft(const DstOp & Dst,const SrcOp & Src,const SrcOp & Amt) buildRotateLeft() argument 2179 buildBitReverse(const DstOp & Dst,const SrcOp & Src) buildBitReverse() argument 2184 buildGetFPEnv(const DstOp & Dst) buildGetFPEnv() argument 2199 buildGetFPMode(const DstOp & Dst) buildGetFPMode() argument [all...] |
/llvm-project/libc/test/src/string/ |
H A D | bcopy_test.cpp |
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H A D | memmove_test.cpp | 24 void *const Dst = Buffer; TEST() local 33 void *const Dst = Buffer; TEST() local 44 void *const Dst = Buffer + 1; TEST() local 53 void *const Dst = Buffer + 2; TEST() local 66 void *const Dst = Buffer + 1; TEST() local 75 void *const Dst = Buffer + 2; TEST() local [all...] |
/llvm-project/clang/test/CodeGen/SystemZ/ |
H A D | atomic_fp_load_store.c | 31 void fun3(_Atomic float *Dst, float Arg) { in fun3() 37 void fun4(_Atomic double *Dst, double Arg) { in fun4() 43 void fun5(_Atomic long double *Dst, long double Arg) { in fun5() 111 void fun3_vol(_Atomic volatile float *Dst, float Arg) { in fun3_vol() 117 void fun4_vol(_Atomic volatile double *Dst, double Arg) { in fun4_vol() 123 void fun5_vol(_Atomic volatile long double *Dst, long double Arg) { in fun5_vol()
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H A D | vec-abi-gnuattr-15.c | 10 void fun(v4i32 Arg, v4i32 *Dst) { in fun()
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H A D | vec-abi-gnuattr-01.c | 12 void foo(v4i32 *Dst) { in foo()
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/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | CombinerHelperVectorOps.cpp | 37 Register Dst = Extract->getReg(0); in matchExtractVectorElement() local 130 Register Dst = Extract->getReg(0); in matchExtractVectorElementWithDifferentIndices() local 200 Register Dst = Extract->getReg(0); matchExtractVectorElementWithBuildVector() local 261 Register Dst = Extract->getReg(0); matchExtractVectorElementWithBuildVectorTrunc() local 340 Register Dst = Extract->getReg(0); matchExtractVectorElementWithShuffleVector() local 386 Register Dst = Insert->getReg(0); matchInsertVectorElementOOB() local 411 Register Dst = Add->getReg(0); matchAddOfVScale() local 433 Register Dst = MO.getReg(); matchMulOfVScale() local 450 Register Dst = MO.getReg(); matchSubOfVScale() local 474 Register Dst = MO.getReg(); matchShlOfVScale() local [all...] |
/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonPeephole.cpp | 133 MachineOperand &Dst = MI.getOperand(0); runOnMachineFunction() local 150 MachineOperand &Dst = MI.getOperand(0); runOnMachineFunction() local 167 MachineOperand &Dst = MI.getOperand(0); runOnMachineFunction() local 181 MachineOperand &Dst = MI.getOperand(0); runOnMachineFunction() local 198 MachineOperand &Dst = MI.getOperand(0); runOnMachineFunction() local [all...] |
/llvm-project/clang/lib/Analysis/ |
H A D | CFGReachabilityAnalysis.cpp | 27 const CFGBlock *Dst) { in isReachable() 42 void CFGReverseBlockReachabilityAnalysis::mapReachability(const CFGBlock *Dst) { in mapReachability()
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/llvm-project/llvm/unittests/Support/ |
H A D | ConvertEBCDICTest.cpp | 47 SmallString<64> Dst; in TEST() local 78 SmallString<64> Dst; in TEST() local
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/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | CostTable.h | 57 MVT::SimpleValueType Dst; member 67 int ISD, MVT Dst, MVT Src) { in ConvertCostTableLookup() 82 int ISD, MVT Dst, MVT Src) { in ConvertCostTableLookup()
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/llvm-project/llvm/lib/Analysis/ |
H A D | DependenceGraphBuilder.cpp | 163 const EdgeKind K) { in createPiBlocks() 180 const Direction Dir) { in createPiBlocks() 310 auto createConfusedEdges = [&](NodeType &Src, NodeType &Dst) { in createMemoryDependencyEdges() 323 auto createForwardEdge = [&](NodeType &Src, NodeType &Dst) { in createMemoryDependencyEdges() 331 auto createBackwardEdge = [&](NodeType &Src, NodeType &Dst) { in createMemoryDependencyEdges()
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/llvm-project/clang/lib/StaticAnalyzer/Core/ |
H A D | ExprEngineC.cpp | 42 ExplodedNodeSet &Dst) { in VisitBinaryOperator() 194 ExplodedNodeSet &Dst) { in VisitBlockExpr() 283 ExplodedNode *Pred, ExplodedNodeSet &Dst) { in VisitCast() 542 ExplodedNodeSet &Dst) { in VisitCompoundLiteralExpr() 566 ExplodedNodeSet &Dst) { in VisitDeclStmt() 642 ExplodedNodeSet &Dst) { in VisitLogicalExpr() 737 ExplodedNodeSet &Dst) { in VisitInitListExpr() 787 ExplodedNodeSet &Dst) { in VisitGuardedExpr() 849 ExplodedNode *Pred, ExplodedNodeSet &Dst) { in VisitOffsetOfExpr() 869 ExplodedNodeSet &Dst) { in VisitUnaryExprOrTypeTraitExpr() [all …]
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H A D | ExprEngineObjC.cpp | 23 ExplodedNodeSet &Dst) { in VisitLvalObjCIvarRefExpr() 40 ExplodedNodeSet &Dst) { in VisitObjCAtSynchronizedStmt() 85 ExplodedNodeSet &Dst) { in VisitObjCForCollectionStmt() 149 ExplodedNodeSet &Dst) { in VisitObjCMessage()
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H A D | ExprEngineCXX.cpp | 32 ExplodedNodeSet &Dst) { in CreateCXXTemporaryObject() argument 67 ExplodedNodeSet Dst; in performTrivialCopy() local 846 VisitCXXConstructExpr(const CXXConstructExpr * CE,ExplodedNode * Pred,ExplodedNodeSet & Dst) VisitCXXConstructExpr() argument 852 VisitCXXInheritedCtorInitExpr(const CXXInheritedCtorInitExpr * CE,ExplodedNode * Pred,ExplodedNodeSet & Dst) VisitCXXInheritedCtorInitExpr() argument 861 VisitCXXDestructor(QualType ObjectType,const MemRegion * Dest,const Stmt * S,bool IsBaseDtor,ExplodedNode * Pred,ExplodedNodeSet & Dst,EvalCallOptions & CallOpts) VisitCXXDestructor() argument 925 VisitCXXNewAllocatorCall(const CXXNewExpr * CNE,ExplodedNode * Pred,ExplodedNodeSet & Dst) VisitCXXNewAllocatorCall() argument 996 VisitCXXNewExpr(const CXXNewExpr * CNE,ExplodedNode * Pred,ExplodedNodeSet & Dst) VisitCXXNewExpr() argument 1128 VisitCXXDeleteExpr(const CXXDeleteExpr * CDE,ExplodedNode * Pred,ExplodedNodeSet & Dst) VisitCXXDeleteExpr() argument 1150 VisitCXXCatchStmt(const CXXCatchStmt * CS,ExplodedNode * Pred,ExplodedNodeSet & Dst) VisitCXXCatchStmt() argument 1168 VisitCXXThisExpr(const CXXThisExpr * TE,ExplodedNode * Pred,ExplodedNodeSet & Dst) VisitCXXThisExpr() argument 1184 VisitLambdaExpr(const LambdaExpr * LE,ExplodedNode * Pred,ExplodedNodeSet & Dst) VisitLambdaExpr() argument [all...] |
/llvm-project/llvm/bindings/ocaml/linker/ |
H A D | linker_ocaml.c | 29 value llvm_link_modules(value Dst, value Src) { in llvm_link_modules()
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/llvm-project/llvm/lib/Target/X86/ |
H A D | X86SelectionDAGInfo.cpp | 48 EmitTargetCodeForMemset(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Dst,SDValue Val,SDValue Size,Align Alignment,bool isVolatile,bool AlwaysInline,MachinePointerInfo DstPtrInfo) const EmitTargetCodeForMemset() argument 157 emitRepmovs(const X86Subtarget & Subtarget,SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Dst,SDValue Src,SDValue Size,MVT AVT) emitRepmovs() argument 179 emitRepmovsB(const X86Subtarget & Subtarget,SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Dst,SDValue Src,uint64_t Size) emitRepmovsB() argument 209 emitConstantSizeRepmov(SelectionDAG & DAG,const X86Subtarget & Subtarget,const SDLoc & dl,SDValue Chain,SDValue Dst,SDValue Src,uint64_t Size,EVT SizeVT,Align Alignment,bool isVolatile,bool AlwaysInline,MachinePointerInfo DstPtrInfo,MachinePointerInfo SrcPtrInfo) emitConstantSizeRepmov() argument 264 EmitTargetCodeForMemcpy(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Dst,SDValue Src,SDValue Size,Align Alignment,bool isVolatile,bool AlwaysInline,MachinePointerInfo DstPtrInfo,MachinePointerInfo SrcPtrInfo) const EmitTargetCodeForMemcpy() argument [all...] |
/llvm-project/clang/lib/Analysis/FlowSensitive/ |
H A D | RecordOps.cpp | 20 StorageLocation *DstFieldLoc, RecordStorageLocation &Dst, in copyField() 51 void copyRecord(RecordStorageLocation &Src, RecordStorageLocation &Dst, in copyRecord()
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/llvm-project/llvm/lib/Transforms/Utils/ |
H A D | SampleProfileInference.cpp | 133 void addEdge(uint64_t Src, uint64_t Dst, int64_t Capacity, int64_t Cost) { in addEdge() 156 void addEdge(uint64_t Src, uint64_t Dst, int64_t Cost) { in addEdge() 273 uint64_t Dst = Edge.Dst; in findAugmentingPath() local 348 auto &Dst = Nodes[Edge.Dst]; in findAugmentingDAG() local 388 uint64_t Dst = Edge.Dst; in findAugmentingDAG() local 447 uint64_t Dst = Edge->Dst; in augmentFlowAlongDAG() local 466 uint64_t Dst = Edge->Dst; in augmentFlowAlongDAG() local 512 uint64_t Dst = Edge.Dst; in identifyShortestEdges() local 559 uint64_t Dst; member 656 uint64_t Dst = Jump->Target; in findReachable() local [all …]
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/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZSelectionDAGInfo.cpp | 61 SDValue Chain, SDValue Dst, SDValue Src, in EmitTargetCodeForMemcpy() argument 78 return emitMemMemImm(DAG, DL, SystemZISD::MVC, Chain, Dst, Sr in memsetStore() argument 25 createMemMemNode(SelectionDAG & DAG,const SDLoc & DL,unsigned Op,SDValue Chain,SDValue Dst,SDValue Src,SDValue LenAdj,SDValue Byte) createMemMemNode() argument 42 emitMemMemImm(SelectionDAG & DAG,const SDLoc & DL,unsigned Op,SDValue Chain,SDValue Dst,SDValue Src,uint64_t Size,SDValue Byte=SDValue ()) emitMemMemImm() argument 51 emitMemMemReg(SelectionDAG & DAG,const SDLoc & DL,unsigned Op,SDValue Chain,SDValue Dst,SDValue Src,SDValue Size,SDValue Byte=SDValue ()) emitMemMemReg() argument 89 EmitTargetCodeForMemset(SelectionDAG & DAG,const SDLoc & DL,SDValue Chain,SDValue Dst,SDValue Byte,SDValue Size,Align Alignment,bool IsVolatile,bool AlwaysInline,MachinePointerInfo DstPtrInfo) const EmitTargetCodeForMemset() argument [all...] |
/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMSelectionDAGInfo.cpp | 39 EmitSpecializedLibcall(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Dst,SDValue Src,SDValue Size,unsigned Align,RTLIB::Libcall LC) const EmitSpecializedLibcall() argument 169 EmitTargetCodeForMemcpy(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Dst,SDValue Src,SDValue Size,Align Alignment,bool isVolatile,bool AlwaysInline,MachinePointerInfo DstPtrInfo,MachinePointerInfo SrcPtrInfo) const EmitTargetCodeForMemcpy() argument 287 EmitTargetCodeForMemmove(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Dst,SDValue Src,SDValue Size,Align Alignment,bool isVolatile,MachinePointerInfo DstPtrInfo,MachinePointerInfo SrcPtrInfo) const EmitTargetCodeForMemmove() argument 295 EmitTargetCodeForMemset(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Dst,SDValue Src,SDValue Size,Align Alignment,bool isVolatile,bool AlwaysInline,MachinePointerInfo DstPtrInfo) const EmitTargetCodeForMemset() argument [all...] |
/llvm-project/bolt/include/bolt/Core/ |
H A D | CallGraph.h | 127 ArcIterator findArc(NodeId Src, NodeId Dst) { in findArc() 130 ArcConstIterator findArc(NodeId Src, NodeId Dst) const { in findArc() 181 for (NodeId Dst : Nodes[F].successors()) { in printDot() local
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/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64SelectionDAGInfo.cpp | 26 EmitMOPS(AArch64ISD::NodeType SDOpcode,SelectionDAG & DAG,const SDLoc & DL,SDValue Chain,SDValue Dst,SDValue SrcOrValue,SDValue Size,Align Alignment,bool isVolatile,MachinePointerInfo DstPtrInfo,MachinePointerInfo SrcPtrInfo) const EmitMOPS() argument 86 EmitStreamingCompatibleMemLibCall(SelectionDAG & DAG,const SDLoc & DL,SDValue Chain,SDValue Dst,SDValue Src,SDValue Size,RTLIB::Libcall LC) const EmitStreamingCompatibleMemLibCall() argument 144 EmitTargetCodeForMemcpy(SelectionDAG & DAG,const SDLoc & DL,SDValue Chain,SDValue Dst,SDValue Src,SDValue Size,Align Alignment,bool isVolatile,bool AlwaysInline,MachinePointerInfo DstPtrInfo,MachinePointerInfo SrcPtrInfo) const EmitTargetCodeForMemcpy() argument 162 EmitTargetCodeForMemset(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Dst,SDValue Src,SDValue Size,Align Alignment,bool isVolatile,bool AlwaysInline,MachinePointerInfo DstPtrInfo) const EmitTargetCodeForMemset() argument 180 EmitTargetCodeForMemmove(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Dst,SDValue Src,SDValue Size,Align Alignment,bool isVolatile,MachinePointerInfo DstPtrInfo,MachinePointerInfo SrcPtrInfo) const EmitTargetCodeForMemmove() argument [all...] |
H A D | AArch64AdvSIMDScalarPass.cpp | 239 Register Dst = MI.getOperand(0).getReg(); in isProfitableToTransform() local 275 unsigned Dst, unsigned Src, bool IsKill) { in insertCopy() 357 Register Dst = MRI->createVirtualRegister(&AArch64::FPR64RegClass); in transformInstruction() local
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/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblySelectionDAGInfo.cpp | 22 EmitTargetCodeForMemcpy(SelectionDAG & DAG,const SDLoc & DL,SDValue Chain,SDValue Dst,SDValue Src,SDValue Size,Align Alignment,bool IsVolatile,bool AlwaysInline,MachinePointerInfo DstPtrInfo,MachinePointerInfo SrcPtrInfo) const EmitTargetCodeForMemcpy() argument 46 EmitTargetCodeForMemset(SelectionDAG & DAG,const SDLoc & DL,SDValue Chain,SDValue Dst,SDValue Val,SDValue Size,Align Alignment,bool IsVolatile,bool AlwaysInline,MachinePointerInfo DstPtrInfo) const EmitTargetCodeForMemset() argument
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