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Searched defs:Div (Results 1 – 25 of 26) sorted by relevance

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/freebsd-src/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DIntegerDivision.cpp407 bool llvm::expandDivision(BinaryOperator *Div) { in expandDivision()
552 bool llvm::expandDivisionUpTo32Bits(BinaryOperator *Div) { in expandDivisionUpTo32Bits()
600 bool llvm::expandDivisionUpTo64Bits(BinaryOperator *Div) { in expandDivisionUpTo64Bits()
/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/
H A DMVETailPredication.cpp327 const SCEV *Div = SE->getUDivExpr( in IsSafeActiveMask() local
H A DARMISelLowering.cpp20733 SDValue Div = DAG.getNode(DivOpcode, dl, VT, Dividend, Divisor); LowerDivRem() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVMatInt.cpp367 Div = 5; in generateInstSeq() local
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/freebsd-src/contrib/llvm-project/clang/lib/CodeGen/Targets/
H A DNVPTX.cpp141 const unsigned Div = std::min<unsigned>(MaxSize, Alignment); coerceToIntArrayWithLimit() local
/freebsd-src/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DDivRemPairs.cpp56 Instruction *Div; in matchExpandedRem() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVPrepareFunctions.cpp229 Value *Div = IRB.CreateUDiv(Mul, UMulFunc->getArg(0)); buildUMulWithOverflowFunc() local
/freebsd-src/contrib/llvm-project/llvm/lib/Analysis/
H A DLoopCacheAnalysis.cpp432 const SCEV *Div = SE.getUDivExactExpr(AccessFn, ElemSize); delinearize() local
H A DBranchProbabilityInfo.cpp501 uint32_t Div = static_cast<uint32_t>( in calcMetadataWeights() local
H A DScalarEvolution.cpp1777 if (auto *Div = dyn_cast<SCEVUDivExpr>(Op)) getZeroExtendExprImpl() local
3515 const SCEV *Div = getUDivExpr(Op, RHSC); getUDivExpr() local
15211 if (auto *Div = dyn_cast<SCEVUDivExpr>(MulLHS)) applyLoopGuards() local
/freebsd-src/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCExpr.h489 Div, ///< Signed division. global() enumerator
/freebsd-src/contrib/llvm-project/llvm/lib/IR/
H A DConstantFold.cpp1686 Constant *Div = ConstantFoldGetElementPtr() local
H A DAsmWriter.cpp1391 } else if (const PossiblyExactOperator *Div = WriteOptimizationInfo() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp1958 SDValue Div = DAG.getNode(ISD::ADD, DL, VT, iq, jq); LowerDIVREM24() local
2139 SDValue Div = DAG.getSelectCC(DL, C3, Zero, Sel1, Mulhi3, ISD::SETNE); LowerUDIVREM64() local
2292 SDValue Div = DAG.getNode(ISD::UDIVREM, DL, DAG.getVTList(VT, VT), LHS, RHS); LowerSDIVREM() local
2316 SDValue Div = DAG.getNode(ISD::FDIV, SL, VT, X, Y, Flags); LowerFREM() local
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H A DAMDGPUCodeGenPrepare.cpp1294 Value *Div = Builder.CreateAdd(IQ, JQ); expandDivRem24Impl() local
H A DAMDGPULegalizerInfo.cpp2389 auto Div = B.buildFDiv(Ty, Src0Reg, Src1Reg, Flags); legalizeFrem() local
/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorOps.cpp1559 SDValue Div = DAG.getNode(DivOpc, DL, VT, Dividend, Divisor, Mask, EVL); ExpandVP_REM() local
/freebsd-src/contrib/llvm-project/llvm/lib/MC/
H A DMCWin64EH.cpp265 const MCSymbol *RHS, int Div) { in GetSubDivExpr()
/freebsd-src/contrib/llvm-project/clang/lib/CodeGen/
H A DCGExprComplex.cpp308 HANDLEBINOP(Div) HANDLEBINOP() argument
/freebsd-src/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineMulDivRem.cpp377 BinaryOperator *Div = dyn_cast<BinaryOperator>(Op0); visitMul() local
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H A DInstCombineCompares.cpp2613 foldICmpDivConstant(ICmpInst & Cmp,BinaryOperator * Div,const APInt & C) foldICmpDivConstant() argument
4376 Instruction *Div; foldMultiplicationOverflowCheck() local
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/freebsd-src/contrib/llvm-project/clang/lib/AST/Interp/
H A DInterp.h429 bool Div(InterpState &S, CodePtr OpPC) { Div() function
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp8108 ConvertOmodDiv(int64_t & Div) ConvertOmodDiv() argument
/freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp12595 Register Div = MRI.createVirtualRegister(isPPC64 ? G8RC : GPRC); emitProbedAlloca() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp25965 SDValue Div = DAG.getNode(Op.getOpcode(), dl, WideVT, Op0, Op1); LowerFixedLengthVectorIntDivideToSVE() local
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