/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
H A D | SIFormMemoryClauses.cpp | 152 bool SIFormMemoryClauses::canBundle(const MachineInstr &MI, const RegUse &Defs, in canBundle() 219 RegUse &Defs, RegUse &Uses) const { in collectRegUses() 247 RegUse &Defs, RegUse &Uses, in processRegUses() 303 RegUse Defs, Uses; in runOnMachineFunction() local
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H A D | SIPostRABundler.cpp | 49 SmallSet<Register, 16> Defs; member in __anone4fe554b0111::SIPostRABundler
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H A D | SIFoldOperands.cpp | 466 SmallVectorImpl<std::pair<MachineOperand *, unsigned>> &Defs, in getRegSeqInit() 539 SmallVector<std::pair<MachineOperand*, unsigned>, 32> Defs; in tryToFoldACImm() local 722 SmallVector<std::pair<MachineOperand*, unsigned>, 32> Defs; in foldOperand() local 1559 SmallVector<std::pair<MachineOperand*, unsigned>, 32> Defs; in tryFoldRegSequence() local
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H A D | SIFixSGPRCopies.cpp | 462 auto &Defs = Init.second; in hoistAndMergeSGPRInits() local 554 auto &Defs = Init.second; in hoistAndMergeSGPRInits() local 567 auto &Defs = Init.second; in hoistAndMergeSGPRInits() local
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/openbsd-src/gnu/llvm/llvm/tools/llvm-exegesis/lib/ |
H A D | ParallelSnippetGenerator.cpp | 149 const BitVector &Uses, const BitVector &Defs, const InstructionTemplate &IT, in generateSingleRegisterForInstrAvoidingDefUseOverlap() 217 BitVector &Uses, BitVector &Defs, InstructionTemplate IT, in generateSingleSnippetForInstrAvoidingDefUseOverlap() 276 BitVector Defs(State.getRegInfo().getNumRegs()); in generateSnippetForInstrAvoidingDefUseOverlap() local
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H A D | MCInstrDescView.h | 206 SmallVector<RegisterOperandAssignment, 1> Defs; // Unlikely size() > 1. member
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/openbsd-src/gnu/llvm/clang/utils/TableGen/ |
H A D | ClangDataCollectorsEmitter.cpp | 8 const auto &Defs = RK.getClasses(); in EmitClangDataCollectors() local
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H A D | SveEmitter.cpp | 1209 SmallVector<std::unique_ptr<Intrinsic>, 128> Defs; in createHeader() local 1252 SmallVector<std::unique_ptr<Intrinsic>, 128> Defs; in createBuiltins() local 1284 SmallVector<std::unique_ptr<Intrinsic>, 128> Defs; in createCodeGenMap() local 1317 SmallVector<std::unique_ptr<Intrinsic>, 128> Defs; in createRangeChecks() local
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H A D | RISCVVEmitter.cpp | 407 std::vector<std::unique_ptr<RVVIntrinsic>> Defs; in createBuiltins() local 438 std::vector<std::unique_ptr<RVVIntrinsic>> Defs; in createCodeGen() local 712 std::vector<std::unique_ptr<RVVIntrinsic>> Defs; in createSema() local
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H A D | NeonEmitter.cpp | 2009 SmallVectorImpl<Intrinsic *> &Defs) { in genBuiltinsDef() 2045 SmallVectorImpl<Intrinsic *> &Defs) { in genOverloadTypeCheckCode() 2124 SmallVectorImpl<Intrinsic *> &Defs) { in genIntrinsicRangeCheckCode() 2214 SmallVector<Intrinsic *, 128> Defs; in runHeader() local 2385 SmallVector<Intrinsic *, 128> Defs; in run() local 2494 SmallVector<Intrinsic *, 128> Defs; in runFP16() local 2571 SmallVector<Intrinsic *, 128> Defs; in runBF16() local
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/openbsd-src/gnu/llvm/llvm/lib/CodeGen/ |
H A D | LiveVariables.cpp | 441 SmallVectorImpl<unsigned> &Defs) { in HandlePhysRegDef() 484 SmallVectorImpl<unsigned> &Defs) { in UpdatePhysRegDefs() 497 SmallVectorImpl<unsigned> &Defs) { in runOnInstr() 560 SmallVector<unsigned, 4> Defs; in runOnBlock() local 837 DenseSet<unsigned> Defs, Kills; in addNewBlock() local
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H A D | RDFLiveness.cpp | 171 SmallSet<NodeId,32> Defs; in getAllReachingDefs() local 309 NodeSet &Visited, const NodeSet &Defs) { in getAllReachingDefsRec() 315 NodeSet &Visited, const NodeSet &Defs, unsigned Nest, unsigned MaxNest) { in getAllReachingDefsRecImpl()
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H A D | ReachingDefAnalysis.cpp | 419 MCRegister PhysReg, InstSet &Defs, in getLiveOuts() 561 SmallSet<int, 2> Defs; in isSafeToMove() local
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/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
H A D | Thumb2ITBlockPass.cpp | 138 RegisterSet &Defs, RegisterSet &Uses) { in MoveCopyOutOfITBlock() 196 RegisterSet Defs, Uses; in InsertITInstructions() local
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H A D | A15SDOptimizer.cpp | 398 SmallVector<unsigned, 8> Defs; in getReadDPRs() local 591 SmallVector<unsigned, 8> Defs = getReadDPRs(MI); in runOnInstruction() local
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/openbsd-src/gnu/llvm/llvm/lib/Analysis/ |
H A D | MemorySSAUpdater.cpp | 148 auto *Defs = MSSA->getWritableBlockDefs(MA->getBlock()); in getPreviousDefInBlock() local 175 auto *Defs = MSSA->getWritableBlockDefs(BB); in getPreviousDefFromEnd() local 257 auto *Defs = MSSA->getBlockDefs(MU->getBlock()); in insertUse() local 267 if (auto *Defs = MSSA->getWritableBlockDefs(StartBlock)) { in insertUse() local 470 auto *Defs = MSSA->getWritableBlockDefs(NewDef->getBlock()); in fixupDefs() local 497 if (auto *Defs = MSSA->getWritableBlockDefs(FixupBlock)) { in fixupDefs() local 872 MemorySSA::DefsList *Defs = MSSA->getWritableBlockDefs(BB); in applyInsertUpdates() local 1241 auto *Defs = MSSA->getWritableBlockDefs(From); in moveAllAccesses() local
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H A D | MemorySSA.cpp | 537 auto *Defs = MSSA.getBlockDefs(Node->getBlock()); in getWalkTarget() local 1525 DefsList *Defs = nullptr; in buildMemorySSA() local 1595 auto *Defs = getOrCreateDefsList(BB); in insertIntoListsForBlock() local 1602 auto *Defs = getOrCreateDefsList(BB); in insertIntoListsForBlock() local 1611 auto *Defs = getOrCreateDefsList(BB); in insertIntoListsForBlock() local 1624 auto *Defs = getOrCreateDefsList(BB); in insertIntoListsBefore() local 1833 std::unique_ptr<DefsList> &Defs = DefsIt->second; in removeFromLists() local
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/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/ |
H A D | HexagonGenMux.cpp | 100 BitVector Defs, Uses; member 158 void HexagonGenMux::getDefsUses(const MachineInstr *MI, BitVector &Defs, in getDefsUses() 182 BitVector Defs(NR), Uses(NR); in buildMaps() local
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H A D | HexagonExpandCondsets.cpp | 394 MachineBasicBlock *Dest) -> bool { in updateDeadsInRange() 416 SetVector<MachineBasicBlock*> Defs; in updateDeadsInRange() local 816 bool HexagonExpandCondsets::canMoveOver(MachineInstr &MI, ReferenceMap &Defs, in canMoveOver() 989 ReferenceMap Uses, Defs; in predicate() local
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H A D | HexagonBitSimplify.cpp | 299 RegisterSet Defs; in INITIALIZE_PASS_DEPENDENCY() local 318 RegisterSet &Defs) { in getInstrDefs() 1498 RegisterSet Defs; in processBlock() local 1626 RegisterSet Defs; in processBlock() local 2738 RegisterSet Defs; in processBlock() local 2995 RegisterSet Defs; in getDefReg() local 3192 RegisterSet Defs; in processLoop() local 3258 RegisterSet Defs; in processLoop() local
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H A D | HexagonRDFOpt.cpp | 256 NodeList Defs; in rewrite() local
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/openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/ |
H A D | PPCBoolRetToInt.cpp | 73 SmallPtrSet<Value *, 8> Defs; in findAllDefs() local 222 auto Defs = findAllDefs(U); in runOnUse() local
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/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/MCTargetDesc/ |
H A D | HexagonMCChecker.h | 49 DenseMap<unsigned, PredSet> Defs; variable
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/openbsd-src/gnu/llvm/llvm/utils/TableGen/ |
H A D | CTagsEmitter.cpp | 70 const auto &Defs = Records.getDefs(); in run() local
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/openbsd-src/gnu/llvm/llvm/lib/Target/Mips/ |
H A D | MipsDelaySlotFiller.cpp | 136 BitVector Defs, Uses; member in __anona0ae290d0111::RegDefsUses 202 SmallPtrSet<ValueType, 4> Uses, Defs; member in __anona0ae290d0111::MemDefsUses
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