/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64CondBrTuning.cpp | 143 MachineInstr &DefMI) { in tryToTuneBranch() 313 MachineInstr *DefMI = getOperandDef(MI.getOperand(0)); in runOnMachineFunction() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
H A D | MLxExpansionPass.cpp | 94 MachineInstr *DefMI = MRI->getVRegDef(Reg); in getAccDefMI() local 146 MachineInstr *DefMI = MRI->getVRegDef(Reg); in hasLoopHazard() local 217 MachineInstr *DefMI = getAccDefMI(MI); in FindMLxHazard() local
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H A D | ARMHazardRecognizer.cpp | 26 static bool hasRAWHazard(MachineInstr *DefMI, MachineInstr *MI, in hasRAWHazard() 52 MachineInstr *DefMI = LastMI; in getHazardType() local
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H A D | ARMBaseInstrInfo.cpp | 2335 MachineInstr *DefMI = canFoldIntoMOVCC(MI.getOperand(2).getReg(), MRI, this); in optimizeSelect() local 3277 bool ARMBaseInstrInfo::FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI, in FoldImmediate() 4153 const MachineInstr &DefMI, in adjustDefLatency() 4331 const MachineInstr &DefMI, in getOperandLatency() 4367 const InstrItineraryData *ItinData, const MachineInstr &DefMI, in getOperandLatencyImpl() 4775 const MachineInstr &DefMI, in hasHighOperandLatency() 4795 const MachineInstr &DefMI, in hasLowDefLatency()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
H A D | LiveRangeEdit.cpp | 71 const MachineInstr *DefMI, in checkRematerializable() 90 MachineInstr *DefMI = LIS.getInstructionFromIndex(OrigVNI->def); in scanRemattable() local 187 MachineInstr *DefMI = nullptr, *UseMI = nullptr; in foldAsLoad() local
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H A D | TargetSchedule.cpp | 185 const MachineInstr *DefMI, unsigned DefOperIdx, in computeOperandLatency() 290 computeOutputLatency(const MachineInstr *DefMI, unsigned DefOperIdx, in computeOutputLatency()
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H A D | MachineTraceMetrics.cpp | 628 const MachineInstr *DefMI; member 770 const MachineInstr *DefMI = MTM.MRI->getVRegDef(LIR.Reg); in computeCrossBlockCriticalPath() local 979 addLiveIns(const MachineInstr *DefMI, unsigned DefOp, in addLiveIns() 1136 const MachineInstr *DefMI = MTM.MRI->getVRegDef(LIR.Reg); in computeInstrHeights() local 1278 bool MachineTraceMetrics::Trace::isDepInTrace(const MachineInstr &DefMI, in isDepInTrace()
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H A D | PHIElimination.cpp | 166 MachineInstr *DefMI = MRI->getVRegDef(VirtReg); in runOnMachineFunction() local 474 if (MachineInstr *DefMI = MRI->getVRegDef(SrcReg)) in LowerPHINode() local
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H A D | MachineSink.cpp | 283 MachineInstr *DefMI = MRI->getVRegDef(SrcReg); in INITIALIZE_PASS_DEPENDENCY() local 621 MachineInstr *DefMI = MRI->getVRegDef(Reg); in isWorthBreakingCriticalEdge() local 818 MachineInstr *DefMI = MRI->getVRegDef(Reg); in isProfitableToSinkTo() local
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H A D | RegisterCoalescer.cpp | 827 MachineInstr *DefMI = LIS->getInstructionFromIndex(AValNo->def); in removeCopyByCommutingDef() local 1112 MachineInstr *DefMI = LIS->getInstructionFromIndex(PVal->def); in removePartialRedundancy() local 1277 MachineInstr *DefMI = LIS->getInstructionFromIndex(ValNo->def); in reMaterializeTrivialDef() local 2536 LaneBitmask JoinVals::computeWriteLanes(const MachineInstr *DefMI, bool &Redef) in computeWriteLanes() argument 2638 const MachineInstr *DefMI = nullptr; in analyzeValue() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64RegisterBankInfo.cpp | 774 MachineInstr *DefMI = MRI.getVRegDef(VReg); in getInstrMapping() local 823 MachineInstr *DefMI = MRI.getVRegDef(VReg); in getInstrMapping() local 903 MachineInstr *DefMI = MRI.getVRegDef(VReg); in getInstrMapping() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
H A D | PPCVSXSwapRemoval.cpp | 618 MachineInstr* DefMI = MRI->getVRegDef(Reg); in formWebs() local 723 MachineInstr *DefMI = MRI->getVRegDef(UseReg); in recordUnoptimizableWebs() local 800 MachineInstr *DefMI = MRI->getVRegDef(UseReg); in markSwapsForRemoval() local
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H A D | PPCInstrInfo.cpp | 167 const MachineInstr &DefMI, unsigned DefIdx, in getOperandLatency() 751 MachineInstr *DefMI = MRI->getVRegDef(Reg); in getConstantFromConstantPool() local 2040 bool PPCInstrInfo::onlyFoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI, in onlyFoldImmediate() 2107 bool PPCInstrInfo::FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI, in FoldImmediate() 3213 MachineInstr *DefMI = nullptr; in getForwardingDefMI() local 3273 MachineInstr *DefMI = getDefMIPostRA(Reg, MI, SeenIntermediateUse); in getForwardingDefMI() local 3645 MachineInstr *DefMI = getForwardingDefMI(MI, ForwardingOperand, in convertToImmediateForm() local 4327 bool PPCInstrInfo::isDefMIElgibleForForwarding(MachineInstr &DefMI, in isDefMIElgibleForForwarding() 4351 const MachineOperand &RegMO, const MachineInstr &DefMI, in isRegElgibleForForwarding() 4390 const MachineInstr &DefMI, in isImmElgibleForForwarding() [all …]
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H A D | PPCMIPeephole.cpp | 518 MachineInstr *DefMI = MRI->getVRegDef(TrueReg1); in simplifyCode() local 628 MachineInstr *DefMI = MRI->getVRegDef(TrueReg); in simplifyCode() local 691 MachineInstr *DefMI = MRI->getVRegDef(TrueReg); in simplifyCode() local
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H A D | PPCInstrInfo.h | 327 const MachineInstr &DefMI, in hasLowDefLatency()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86TileConfig.cpp | 155 for (auto &DefMI : MRI.def_instructions(R)) { in INITIALIZE_PASS_DEPENDENCY() local
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H A D | X86OptimizeLEAs.cpp | 352 for (auto DefMI : List) { in chooseBestLEA() local 529 MachineInstr *DefMI; in removeRedundantAddrCalc() local
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H A D | X86CallFrameOptimization.cpp | 620 MachineInstr &DefMI = *MRI->getVRegDef(Reg); in canFoldIntoRegPush() local
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H A D | X86PreTileConfig.cpp | 211 MachineInstr *DefMI = MRI->getVRegDef(R); in INITIALIZE_PASS_DEPENDENCY() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | SIFixSGPRCopies.cpp | 625 MachineInstr *DefMI = MRI->getVRegDef(SrcReg); in runOnMachineFunction() local 736 MachineInstr *DefMI = MRI->getVRegDef(MO->getReg()); in runOnMachineFunction() local 827 MachineInstr *DefMI = MRI->getVRegDef(MI.getOperand(I).getReg()); in processPHINode() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
H A D | MipsOptimizePICCall.cpp | 280 MachineInstr *DefMI = MRI.getVRegDef(Reg); in isCallViaRegister() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
H A D | Utils.cpp | 387 auto *DefMI = MRI.getVRegDef(Reg); in getDefSrcRegIgnoringCopies() local 420 MachineInstr *DefMI = getDefIgnoringCopies(Reg, MRI); in getOpcodeDef() local 548 const MachineInstr *DefMI = MRI.getVRegDef(Val); in isKnownNeverNaN() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
H A D | BPFMIPeephole.cpp | 464 MachineInstr *DefMI; in eliminateTruncSeq() local
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/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
H A D | TargetInstrInfo.h | 1551 MachineInstr *&DefMI) const { in optimizeLoadInstr() 1561 virtual bool FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI, in FoldImmediate() 1627 const MachineInstr &DefMI, unsigned DefIdx, in hasHighOperandLatency()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
H A D | InstrEmitter.cpp | 502 MachineInstr *DefMI; in EmitSubregNode() local 828 MachineInstr &DefMI = *MRI->def_instr_begin(VReg); in EmitDbgInstrRef() local
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