| /minix3/external/bsd/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMHazardRecognizer.cpp | 19 static bool hasRAWHazard(MachineInstr *DefMI, MachineInstr *MI, in hasRAWHazard()
45 MachineInstr *DefMI = LastMI; in getHazardType() local
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| H A D | MLxExpansionPass.cpp | 95 MachineInstr *DefMI = MRI->getVRegDef(Reg); in getAccDefMI() local
149 MachineInstr *DefMI = MRI->getVRegDef(Reg); in hasLoopHazard() local
220 MachineInstr *DefMI = getAccDefMI(MI); in FindMLxHazard() local
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| H A D | ARMBaseInstrInfo.cpp | 1846 MachineInstr *DefMI = canFoldIntoMOVCC(MI->getOperand(2).getReg(), MRI, this); in optimizeSelect() local
2607 MachineInstr *DefMI, unsigned Reg, in FoldImmediate()
3433 const MachineInstr *DefMI, in adjustDefLatency()
3614 const MachineInstr *DefMI, unsigned DefIdx, in getOperandLatency()
4009 const MachineInstr *DefMI, unsigned DefIdx, in hasHighOperandLatency()
4030 const MachineInstr *DefMI, unsigned DefIdx) const { in hasLowDefLatency() argument
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| H A D | ARMExpandPseudoInsts.cpp | 78 MachineInstrBuilder &DefMI) { in TransferImpOps()
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| /minix3/external/bsd/llvm/dist/llvm/lib/CodeGen/ |
| H A D | LiveRangeEdit.cpp | 52 const MachineInstr *DefMI, in checkRematerializable()
66 MachineInstr *DefMI = LIS.getInstructionFromIndex(VNI->def); in scanRemattable() local
166 MachineInstr *DefMI = nullptr, *UseMI = nullptr; in foldAsLoad() local
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| H A D | TargetSchedule.cpp | 155 const MachineInstr *DefMI, unsigned DefOperIdx, in computeOperandLatency()
276 computeOutputLatency(const MachineInstr *DefMI, unsigned DefOperIdx, in computeOutputLatency()
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| H A D | MachineSink.cpp | 162 MachineInstr *DefMI = MRI->getVRegDef(SrcReg); in INITIALIZE_PASS_DEPENDENCY() local
373 MachineInstr *DefMI = MRI->getVRegDef(Reg); in isWorthBreakingCriticalEdge() local
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| H A D | MachineTraceMetrics.cpp | 613 const MachineInstr *DefMI; member
766 const MachineInstr *DefMI = MTM.MRI->getVRegDef(LIR.Reg); in computeCrossBlockCriticalPath() local
954 addLiveIns(const MachineInstr *DefMI, unsigned DefOp, in addLiveIns()
1113 const MachineInstr *DefMI = MTM.MRI->getVRegDef(LIR.Reg); in computeInstrHeights() local
1252 bool MachineTraceMetrics::Trace::isDepInTrace(const MachineInstr *DefMI, in isDepInTrace()
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| H A D | TargetInstrInfo.cpp | 804 const MachineInstr *DefMI, in hasLowDefLatency()
818 const MachineInstr *DefMI, unsigned DefIdx, in getOperandLatency()
855 const MachineInstr *DefMI, unsigned DefIdx, in computeOperandLatency()
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| H A D | InlineSpiller.cpp | 113 MachineInstr *DefMI; member
665 MachineInstr *DefMI = nullptr; in analyzeSiblingValues() local
740 MachineInstr *DefMI = LIS.getInstructionFromIndex(SVI.SpillVNI->def); in hoistSpill() local
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| H A D | PHIElimination.cpp | 390 if (MachineInstr *DefMI = MRI->getVRegDef(SrcReg)) in LowerPHINode() local
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| H A D | RegisterCoalescer.cpp | 631 MachineInstr *DefMI = LIS->getInstructionFromIndex(AValNo->def); in removeCopyByCommutingDef() local
855 MachineInstr *DefMI = LIS->getInstructionFromIndex(ValNo->def); in reMaterializeTrivialDef() local
1698 unsigned JoinVals::computeWriteLanes(const MachineInstr *DefMI, bool &Redef) in computeWriteLanes() argument
1791 const MachineInstr *DefMI = nullptr; in analyzeValue() local
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| H A D | EarlyIfConversion.cpp | 245 MachineInstr *DefMI = MRI->getVRegDef(Reg); in canSpeculateInstrs() local
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| H A D | MachineCSE.cpp | 132 MachineInstr *DefMI = MRI->getVRegDef(Reg); in INITIALIZE_PASS_DEPENDENCY() local
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| H A D | TailDuplication.cpp | 251 MachineInstr *DefMI = MRI->getVRegDef(VReg); in TailDuplicateAndUpdate() local
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| H A D | PeepholeOptimizer.cpp | 1163 MachineInstr *DefMI = nullptr; in runOnMachineFunction() local
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| H A D | TwoAddressInstructionPass.cpp | 407 MachineInstr *DefMI = &MI; in isKilled() local
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 110 const MachineInstr *DefMI, in hasLowDefLatency()
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| H A D | PPCInstrInfo.cpp | 110 const MachineInstr *DefMI, unsigned DefIdx, in getOperandLatency()
1000 bool PPCInstrInfo::FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI, in FoldImmediate()
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsOptimizePICCall.cpp | 261 MachineInstr *DefMI = MRI.getVRegDef(Reg); in isCallViaRegister() local
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| /minix3/external/bsd/llvm/dist/llvm/include/llvm/Target/ |
| H A D | TargetInstrInfo.h | 996 MachineInstr *&DefMI) const { in optimizeLoadInstr()
1006 virtual bool FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI, in FoldImmediate()
1081 const MachineInstr *DefMI, unsigned DefIdx, in hasHighOperandLatency()
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 296 const MachineInstr *DefMI = MRI.getVRegDef(VReg); in removeCopies() local
314 const MachineInstr *DefMI = MRI.getVRegDef(VReg); in canFoldIntoCSel() local
2930 MachineInstr *DefMI = MRI->getVRegDef(VReg); in optimizeCondBranch() local
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| H A D | AArch64ExpandPseudoInsts.cpp | 51 MachineInstrBuilder &DefMI) { in transferImpOps()
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| /minix3/external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | InstrEmitter.cpp | 494 MachineInstr *DefMI = MRI->getVRegDef(VReg); in EmitSubregNode() local
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 1831 MachineInstr *DefMI = &*I; in regIsPICBase() local
5734 const MachineInstr *DefMI, unsigned DefIdx, in hasHighOperandLatency()
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