/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64CondBrTuning.cpp | 141 MachineInstr &DefMI) { in tryToTuneBranch() 308 MachineInstr *DefMI = getOperandDef(MI.getOperand(0)); in runOnMachineFunction() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | MLxExpansionPass.cpp | 94 MachineInstr *DefMI = MRI->getVRegDef(Reg); in getAccDefMI() local 146 MachineInstr *DefMI = MRI->getVRegDef(Reg); in hasLoopHazard() local 217 MachineInstr *DefMI = getAccDefMI(MI); in FindMLxHazard() local
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H A D | ARMHazardRecognizer.cpp | 28 static bool hasRAWHazard(MachineInstr *DefMI, MachineInstr *MI, in hasRAWHazard() argument 54 MachineInstr *DefMI = LastMI; in getHazardType() local
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H A D | ARMFixCortexA57AES1742098Pass.cpp | 367 MachineInstr *DefMI = *It; in analyzeMF() local
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/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | LiveRangeEdit.cpp | 72 const MachineInstr *DefMI) { in checkRematerializable() argument 90 MachineInstr *DefMI = LIS.getInstructionFromIndex(OrigVNI->def); in scanRemattable() local 209 MachineInstr *DefMI = nullptr, *UseMI = nullptr; in foldAsLoad() local [all...] |
H A D | TargetSchedule.cpp | 174 const MachineInstr *DefMI, unsigned DefOperIdx, in computeOperandLatency() 274 computeOutputLatency(const MachineInstr *DefMI, unsigned DefOperIdx, in computeOutputLatency()
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H A D | MachineTraceMetrics.cpp | 646 const MachineInstr *DefMI; member 783 const MachineInstr *DefMI = MTM.MRI->getVRegDef(LIR.Reg); in computeCrossBlockCriticalPath() local 988 addLiveIns(const MachineInstr * DefMI,unsigned DefOp,ArrayRef<const MachineBasicBlock * > Trace) addLiveIns() argument 1141 const MachineInstr *DefMI = MTM.MRI->getVRegDef(LIR.Reg); computeInstrHeights() local 1282 isDepInTrace(const MachineInstr & DefMI,const MachineInstr & UseMI) const isDepInTrace() argument [all...] |
H A D | PHIElimination.cpp | 165 MachineInstr *DefMI = MRI->getVRegDef(VirtReg); runOnMachineFunction() local 516 if (MachineInstr *DefMI = MRI->getVRegDef(SrcReg)) LowerPHINode() local [all...] |
H A D | MachineLateInstrsCleanup.cpp | 131 if (MachineInstr *DefMI = RegDefs[MBB->getNumber()].lookup(Reg)) in clearKillsForDef() local
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H A D | MachineSink.cpp | 338 MachineInstr *DefMI = MRI->getVRegDef(SrcReg); PerformTrivialForwardCoalescing() local 915 MachineInstr *DefMI = MRI->getVRegDef(Reg); isWorthBreakingCriticalEdge() local 1111 MachineInstr *DefMI = MRI->getVRegDef(Reg); isProfitableToSinkTo() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64RegisterBankInfo.cpp | 889 MachineInstr *DefMI = MRI.getVRegDef(VReg); getInstrMapping() local 900 MachineInstr *DefMI = MRI.getVRegDef(VReg); getInstrMapping() local 959 MachineInstr *DefMI = MRI.getVRegDef(VReg); getInstrMapping() local 1039 MachineInstr *DefMI = MRI.getVRegDef(VReg); getInstrMapping() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
H A D | RISCVRegisterBankInfo.cpp | 340 MachineInstr *DefMI = MRI.getVRegDef(MI.getOperand(0).getReg()); getInstrMapping() local 384 MachineInstr *DefMI = MRI.getVRegDef(VReg); getInstrMapping() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCVSXSwapRemoval.cpp | 620 MachineInstr* DefMI = MRI->getVRegDef(Reg); in formWebs() local 725 MachineInstr *DefMI = MRI->getVRegDef(UseReg); in recordUnoptimizableWebs() local 802 MachineInstr *DefMI = MRI->getVRegDef(UseReg); in markSwapsForRemoval() local
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H A D | PPCInstrInfo.cpp | 169 const InstrItineraryData *ItinData, const MachineInstr &DefMI, in getOperandLatency() argument 732 MachineInstr *DefMI = MRI->getVRegDef(Reg); in getConstantFromConstantPool() local 2032 onlyFoldImmediate(MachineInstr & UseMI,MachineInstr & DefMI,Register Reg) const onlyFoldImmediate() argument 2103 FoldImmediate(MachineInstr & UseMI,MachineInstr & DefMI,Register Reg,MachineRegisterInfo * MRI) const FoldImmediate() argument 3343 MachineInstr *DefMI = nullptr; getForwardingDefMI() local 3405 MachineInstr *DefMI = getDefMIPostRA(Reg, MI, SeenIntermediateUse); getForwardingDefMI() local 3685 MachineInstr *DefMI = getForwardingDefMI(MI, ForwardingOperand, convertToImmediateForm() local 4376 isDefMIElgibleForForwarding(MachineInstr & DefMI,const ImmInstrInfo & III,MachineOperand * & ImmMO,MachineOperand * & RegMO) const isDefMIElgibleForForwarding() argument 4400 isRegElgibleForForwarding(const MachineOperand & RegMO,const MachineInstr & DefMI,const MachineInstr & MI,bool KillDefMI,bool & IsFwdFeederRegKilled,bool & SeenIntermediateUse) const isRegElgibleForForwarding() argument 4441 isImmElgibleForForwarding(const MachineOperand & ImmMO,const MachineInstr & DefMI,const ImmInstrInfo & III,int64_t & Imm,int64_t BaseImm) const isImmElgibleForForwarding() argument 4492 simplifyToLI(MachineInstr & MI,MachineInstr & DefMI,unsigned OpNoForForwarding,MachineInstr ** KilledDef) const simplifyToLI() argument 4729 transformToNewImmFormFedByAdd(MachineInstr & MI,MachineInstr & DefMI,unsigned OpNoForForwarding) const transformToNewImmFormFedByAdd() argument 4800 transformToImmFormFedByAdd(MachineInstr & MI,const ImmInstrInfo & III,unsigned OpNoForForwarding,MachineInstr & DefMI,bool KillDefMI) const transformToImmFormFedByAdd() argument [all...] |
H A D | PPCMIPeephole.cpp | 634 MachineInstr *DefMI = MRI->getVRegDef(TrueReg1); simplifyCode() local 793 MachineInstr *DefMI = MRI->getVRegDef(TrueReg); simplifyCode() local 860 MachineInstr *DefMI = MRI->getVRegDef(TrueReg); simplifyCode() local [all...] |
H A D | PPCInstrInfo.h | 338 const MachineInstr &DefMI, in hasLowDefLatency() argument [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86TileConfig.cpp | 160 for (auto &DefMI : MRI.def_instructions(R)) { INITIALIZE_PASS_DEPENDENCY() local
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H A D | X86OptimizeLEAs.cpp | 350 for (auto *DefMI : List) { in chooseBestLEA() local 525 MachineInstr *DefMI; in removeRedundantAddrCalc() local
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H A D | X86CallFrameOptimization.cpp | 611 MachineInstr &DefMI = *MRI->getVRegDef(Reg); in canFoldIntoRegPush() local
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/freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | Utils.h | 275 MachineInstr *DefMI = getDefIgnoringCopies(Reg, MRI); in getOpcodeDef() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVInsertVSETVLI.cpp | 894 MachineInstr *DefMI = MRI->getVRegDef(InstrInfo.getAVLReg()); computeInfoForInstr() local 936 if (MachineInstr *DefMI = MRI->getVRegDef(Info.getAVLReg())) { insertVSETVLI() local 1058 if (MachineInstr *DefMI = MRI->getVRegDef(Require.getAVLReg())) { needVSETVLI() local 1266 MachineInstr *DefMI = MRI->getVRegDef(InReg); needVSETVLIPHI() local [all...] |
H A D | RISCVRVVInitUndef.cpp |
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
H A D | PPCRegisterBankInfo.cpp | 199 MachineInstr *DefMI = MRI.getVRegDef(MI.getOperand(0).getReg()); getInstrMapping() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIFixSGPRCopies.cpp | 726 const MachineOperand &Def = DefMI->getOperand(0); in runOnMachineFunction() local 825 PHIOperands.insert(DefMI); in processPHINode() local 848 MachineInstr *DefMI = MRI->getVRegDef(MaybeVGPRConstMO.getReg()); tryMoveVGPRConstToSGPR() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsOptimizePICCall.cpp | 279 MachineInstr *DefMI = MRI.getVRegDef(Reg); isCallViaRegister() local
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