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Searched defs:DefIdx (Results 1 – 25 of 40) sorted by relevance

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/openbsd-src/gnu/llvm/llvm/lib/CodeGen/
H A DLiveIntervalCalc.cpp36 SlotIndex DefIdx = in createDeadDef() local
181 unsigned DefIdx; in extendToUses() local
H A DTargetSchedule.cpp142 unsigned DefIdx = 0; in findDefIdx() local
202 unsigned DefIdx = findDefIdx(DefMI, DefOperIdx); in computeOperandLatency() local
H A DTargetInstrInfo.cpp1223 SDNode *DefNode, unsigned DefIdx, in getOperandLatency()
1392 unsigned DefIdx, in getOperandLatency()
1401 const MachineInstr &MI, unsigned DefIdx, in getRegSequenceInputs()
1428 const MachineInstr &MI, unsigned DefIdx, in getExtractSubregInputs()
1453 const MachineInstr &MI, unsigned DefIdx, in getInsertSubregInputs()
H A DLiveRangeEdit.cpp167 SlotIndex DefIdx; in canRematerializeAt() local
H A DRenameIndependentSubregs.cpp335 SlotIndex DefIdx = LIS->InsertMachineInstrInMaps(*ImpDef); in computeMainRangesFixFlags() local
H A DMachineCombiner.cpp234 int DefIdx = DefInstr->findRegisterDefOperandIdx(MO.getReg()); in getDepth() local
H A DMachineVerifier.cpp2096 unsigned DefIdx; in visitMachineOperand() local
2338 unsigned MONum, SlotIndex DefIdx, in checkLivenessAtDef()
2529 SlotIndex DefIdx = LiveInts->getInstructionIndex(*MI); in checkLiveness() local
H A DMachineInstr.cpp265 int DefIdx = MCID->getOperandConstraint(OpNo, MCOI::TIED_TO); in addOperand() local
903 unsigned DefIdx; in getRegClassConstraint() local
1107 void MachineInstr::tieOperands(unsigned DefIdx, unsigned UseIdx) { in tieOperands()
H A DTargetRegisterInfo.cpp392 unsigned SrcIdx, DefIdx; in shareSameRegisterFile() local
/openbsd-src/gnu/llvm/llvm/include/llvm/MC/
H A DMCInstrItineraries.h184 bool hasPipelineForwarding(unsigned DefClass, unsigned DefIdx, in hasPipelineForwarding()
205 int getOperandLatency(unsigned DefClass, unsigned DefIdx, in getOperandLatency()
H A DMCSubtargetInfo.h177 unsigned DefIdx) const { in getWriteLatencyEntry()
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGSDNodes.h141 unsigned DefIdx = 0; variable
H A DScheduleDAGSDNodes.cpp478 unsigned DefIdx = N->getOperand(i).getResNo(); in AddSchedEdges() local
658 unsigned DefIdx = Use->getOperand(OpIdx).getResNo(); in computeOperandLatency() local
/openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/
H A DPPCVSXSwapRemoval.cpp623 int DefIdx = SwapMap[DefMI]; in formWebs() local
727 int DefIdx = SwapMap[DefMI]; in recordUnoptimizableWebs() local
803 int DefIdx = SwapMap[DefMI]; in markSwapsForRemoval() local
H A DPPCInstrInfo.h446 SDNode *DefNode, unsigned DefIdx, in getOperandLatency()
454 unsigned DefIdx) const override { in hasLowDefLatency()
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64CollectLOH.cpp403 int DefIdx = mapRegToGPRIndex(MI.getOperand(0).getReg()); in handleADRP() local
571 int DefIdx = mapRegToGPRIndex(Def.getReg()); in runOnMachineFunction() local
/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizationArtifactCombiner.h542 unsigned DefIdx = 0; in getDefIndex() local
792 for (unsigned DefIdx = 0; DefIdx < NumDefs; ++DefIdx) { in tryCombineUnmergeDefs() local
1042 for (unsigned j = 0, DefIdx = Idx * NewNumDefs; j < NewNumDefs; in tryCombineUnmergeValues() local
1095 for (unsigned DefIdx = 0; DefIdx < NumDefs; ++DefIdx) { in tryCombineUnmergeValues() local
/openbsd-src/gnu/llvm/llvm/lib/MC/
H A DMCSchedule.cpp44 for (unsigned DefIdx = 0, DefEnd = SCDesc.NumWriteLatencyEntries; in computeInstrLatency() local
/openbsd-src/gnu/llvm/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.cpp3892 unsigned DefIdx, unsigned DefAlign) const { in getVLDMDefCycle()
3933 unsigned DefIdx, unsigned DefAlign) const { in getLDMDefCycle()
4036 unsigned DefIdx, unsigned DefAlign, in getOperandLatency()
4147 unsigned &DefIdx, unsigned &Dist) { in getBundledDefMI()
4380 unsigned DefIdx, in getOperandLatency()
4416 unsigned DefIdx, const MCInstrDesc &DefMCID, unsigned DefAdj, in getOperandLatencyImpl()
4476 SDNode *DefNode, unsigned DefIdx, in getOperandLatency()
4824 unsigned DefIdx, in hasHighOperandLatency()
5454 const MachineInstr &MI, unsigned DefIdx, in getRegSequenceLikeInputs()
5481 const MachineInstr &MI, unsigned DefIdx, in getExtractSubregLikeInputs()
[all …]
/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/
H A DTargetInstrInfo.h1294 const MachineInstr &MI, unsigned DefIdx, in getRegSequenceLikeInputs()
1308 unsigned DefIdx, in getExtractSubregLikeInputs()
1322 getInsertSubregLikeInputs(const MachineInstr &MI, unsigned DefIdx, in getInsertSubregLikeInputs()
1697 const MachineInstr &DefMI, unsigned DefIdx, in hasHighOperandLatency()
/openbsd-src/gnu/llvm/llvm/lib/Target/Sparc/
H A DSparcISelDAGToDAG.cpp210 unsigned DefIdx = 0; in tryInlineAsm() local
/openbsd-src/gnu/llvm/llvm/lib/MC/MCDisassembler/
H A DDisassembler.cpp217 for (unsigned DefIdx = 0, DefEnd = SCDesc->NumWriteLatencyEntries; in getLatency() local
/openbsd-src/gnu/llvm/llvm/lib/Target/CSKY/
H A DCSKYISelDAGToDAG.cpp162 unsigned DefIdx = 0; in selectInlineAsm() local
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/
H A DInlineAsmLowering.cpp435 unsigned DefIdx = OpInfo.getMatchedOperand(); in lowerInlineAsm() local
/openbsd-src/gnu/llvm/llvm/lib/Target/WebAssembly/
H A DWebAssemblyRegStackify.cpp657 SlotIndex DefIdx = LIS.getInstructionIndex(*Def).getRegSlot(); in moveAndTeeForMultiUse() local

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