xref: /netbsd-src/sys/external/bsd/drm/dist/shared-core/drm_mode.h (revision d7792ba7fe789bc3d5f4d57a355db3f8d54d5c21)
1 /*
2  * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
3  * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
4  * Copyright (c) 2008 Red Hat Inc.
5  * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
6  * Copyright (c) 2007-2008 Intel Corporation
7  *
8  * Permission is hereby granted, free of charge, to any person obtaining a
9  * copy of this software and associated documentation files (the "Software"),
10  * to deal in the Software without restriction, including without limitation
11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12  * and/or sell copies of the Software, and to permit persons to whom the
13  * Software is furnished to do so, subject to the following conditions:
14  *
15  * The above copyright notice and this permission notice shall be included in
16  * all copies or substantial portions of the Software.
17  *
18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24  * IN THE SOFTWARE.
25  */
26 
27 #ifndef _DRM_MODE_H
28 #define _DRM_MODE_H
29 
30 #ifdef __linux__
31 #if !defined(__KERNEL__) && !defined(_KERNEL)
32 #include <stdint.h>
33 #else
34 #include <linux/kernel.h>
35 #endif
36 #endif
37 
38 #define DRM_DISPLAY_INFO_LEN	32
39 #define DRM_CONNECTOR_NAME_LEN	32
40 #define DRM_DISPLAY_MODE_LEN	32
41 #define DRM_PROP_NAME_LEN	32
42 
43 #define DRM_MODE_TYPE_BUILTIN	(1<<0)
44 #define DRM_MODE_TYPE_CLOCK_C	((1<<1) | DRM_MODE_TYPE_BUILTIN)
45 #define DRM_MODE_TYPE_CRTC_C	((1<<2) | DRM_MODE_TYPE_BUILTIN)
46 #define DRM_MODE_TYPE_PREFERRED	(1<<3)
47 #define DRM_MODE_TYPE_DEFAULT	(1<<4)
48 #define DRM_MODE_TYPE_USERDEF	(1<<5)
49 #define DRM_MODE_TYPE_DRIVER	(1<<6)
50 
51 /* Video mode flags */
52 /* bit compatible with the xorg definitions. */
53 #define DRM_MODE_FLAG_PHSYNC	(1<<0)
54 #define DRM_MODE_FLAG_NHSYNC	(1<<1)
55 #define DRM_MODE_FLAG_PVSYNC	(1<<2)
56 #define DRM_MODE_FLAG_NVSYNC	(1<<3)
57 #define DRM_MODE_FLAG_INTERLACE	(1<<4)
58 #define DRM_MODE_FLAG_DBLSCAN	(1<<5)
59 #define DRM_MODE_FLAG_CSYNC	(1<<6)
60 #define DRM_MODE_FLAG_PCSYNC	(1<<7)
61 #define DRM_MODE_FLAG_NCSYNC	(1<<8)
62 #define DRM_MODE_FLAG_HSKEW	(1<<9) /* hskew provided */
63 #define DRM_MODE_FLAG_BCAST	(1<<10)
64 #define DRM_MODE_FLAG_PIXMUX	(1<<11)
65 #define DRM_MODE_FLAG_DBLCLK	(1<<12)
66 #define DRM_MODE_FLAG_CLKDIV2	(1<<13)
67 
68 /* DPMS flags */
69 /* bit compatible with the xorg definitions. */
70 #define DRM_MODE_DPMS_ON	0
71 #define DRM_MODE_DPMS_STANDBY	1
72 #define DRM_MODE_DPMS_SUSPEND	2
73 #define DRM_MODE_DPMS_OFF	3
74 
75 /* Scaling mode options */
76 #define DRM_MODE_SCALE_NON_GPU		0
77 #define DRM_MODE_SCALE_FULLSCREEN	1
78 #define DRM_MODE_SCALE_NO_SCALE		2
79 #define DRM_MODE_SCALE_ASPECT		3
80 
81 /* Dithering mode options */
82 #define DRM_MODE_DITHERING_OFF	0
83 #define DRM_MODE_DITHERING_ON	1
84 
85 struct drm_mode_modeinfo {
86 	uint32_t clock;
87 	uint16_t hdisplay, hsync_start, hsync_end, htotal, hskew;
88 	uint16_t vdisplay, vsync_start, vsync_end, vtotal, vscan;
89 
90 	uint32_t vrefresh; /* vertical refresh * 1000 */
91 
92 	uint32_t flags;
93 	uint32_t type;
94 	char name[DRM_DISPLAY_MODE_LEN];
95 };
96 
97 struct drm_mode_card_res {
98 	uint64_t fb_id_ptr;
99 	uint64_t crtc_id_ptr;
100 	uint64_t connector_id_ptr;
101 	uint64_t encoder_id_ptr;
102 	uint32_t count_fbs;
103 	uint32_t count_crtcs;
104 	uint32_t count_connectors;
105 	uint32_t count_encoders;
106 	uint32_t min_width, max_width;
107 	uint32_t min_height, max_height;
108 };
109 
110 struct drm_mode_crtc {
111 	uint64_t set_connectors_ptr;
112 	uint32_t count_connectors;
113 
114 	uint32_t crtc_id; /**< Id */
115 	uint32_t fb_id; /**< Id of framebuffer */
116 
117 	uint32_t x, y; /**< Position on the frameuffer */
118 
119 	uint32_t gamma_size;
120 	uint32_t mode_valid;
121 	struct drm_mode_modeinfo mode;
122 };
123 
124 #define DRM_MODE_ENCODER_NONE	0
125 #define DRM_MODE_ENCODER_DAC	1
126 #define DRM_MODE_ENCODER_TMDS	2
127 #define DRM_MODE_ENCODER_LVDS	3
128 #define DRM_MODE_ENCODER_TVDAC	4
129 
130 struct drm_mode_get_encoder {
131 	uint32_t encoder_id;
132 	uint32_t encoder_type;
133 
134 	uint32_t crtc_id; /**< Id of crtc */
135 
136 	uint32_t possible_crtcs;
137 	uint32_t possible_clones;
138 };
139 
140 /* This is for connectors with multiple signal types. */
141 /* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
142 #define DRM_MODE_SUBCONNECTOR_Automatic	0
143 #define DRM_MODE_SUBCONNECTOR_Unknown	0
144 #define DRM_MODE_SUBCONNECTOR_DVID	3
145 #define DRM_MODE_SUBCONNECTOR_DVIA	4
146 #define DRM_MODE_SUBCONNECTOR_Composite	5
147 #define DRM_MODE_SUBCONNECTOR_SVIDEO	6
148 #define DRM_MODE_SUBCONNECTOR_Component	8
149 
150 #define DRM_MODE_CONNECTOR_Unknown	0
151 #define DRM_MODE_CONNECTOR_VGA		1
152 #define DRM_MODE_CONNECTOR_DVII		2
153 #define DRM_MODE_CONNECTOR_DVID		3
154 #define DRM_MODE_CONNECTOR_DVIA		4
155 #define DRM_MODE_CONNECTOR_Composite	5
156 #define DRM_MODE_CONNECTOR_SVIDEO	6
157 #define DRM_MODE_CONNECTOR_LVDS		7
158 #define DRM_MODE_CONNECTOR_Component	8
159 #define DRM_MODE_CONNECTOR_9PinDIN	9
160 #define DRM_MODE_CONNECTOR_DisplayPort	10
161 #define DRM_MODE_CONNECTOR_HDMIA	11
162 #define DRM_MODE_CONNECTOR_HDMIB	12
163 
164 struct drm_mode_get_connector {
165 
166 	uint64_t encoders_ptr;
167 	uint64_t modes_ptr;
168 	uint64_t props_ptr;
169 	uint64_t prop_values_ptr;
170 
171 	uint32_t count_modes;
172 	uint32_t count_props;
173 	uint32_t count_encoders;
174 
175 	uint32_t encoder_id; /**< Current Encoder */
176 	uint32_t connector_id; /**< Id */
177 	uint32_t connector_type;
178 	uint32_t connector_type_id;
179 
180 	uint32_t connection;
181 	uint32_t mm_width, mm_height; /**< HxW in millimeters */
182 	uint32_t subpixel;
183 };
184 
185 #define DRM_MODE_PROP_PENDING	(1<<0)
186 #define DRM_MODE_PROP_RANGE	(1<<1)
187 #define DRM_MODE_PROP_IMMUTABLE	(1<<2)
188 #define DRM_MODE_PROP_ENUM	(1<<3) /* enumerated type with text strings */
189 #define DRM_MODE_PROP_BLOB	(1<<4)
190 
191 struct drm_mode_property_enum {
192 	uint64_t value;
193 	char name[DRM_PROP_NAME_LEN];
194 };
195 
196 struct drm_mode_get_property {
197 	uint64_t values_ptr; /* values and blob lengths */
198 	uint64_t enum_blob_ptr; /* enum and blob id ptrs */
199 
200 	uint32_t prop_id;
201 	uint32_t flags;
202 	char name[DRM_PROP_NAME_LEN];
203 
204 	uint32_t count_values;
205 	uint32_t count_enum_blobs;
206 };
207 
208 struct drm_mode_connector_set_property {
209 	uint64_t value;
210 	uint32_t prop_id;
211 	uint32_t connector_id;
212 };
213 
214 struct drm_mode_get_blob {
215 	uint32_t blob_id;
216 	uint32_t length;
217 	uint64_t data;
218 };
219 
220 struct drm_mode_fb_cmd {
221 	uint32_t fb_id;
222 	uint32_t width, height;
223 	uint32_t pitch;
224 	uint32_t bpp;
225 	uint32_t depth;
226 	/* driver specific handle */
227 	uint32_t handle;
228 };
229 
230 struct drm_mode_mode_cmd {
231 	uint32_t connector_id;
232 	struct drm_mode_modeinfo mode;
233 };
234 
235 #define DRM_MODE_CURSOR_BO	(1<<0)
236 #define DRM_MODE_CURSOR_MOVE	(1<<1)
237 
238 /*
239  * depending on the value in flags diffrent members are used.
240  *
241  * CURSOR_BO uses
242  *    crtc
243  *    width
244  *    height
245  *    handle - if 0 turns the cursor of
246  *
247  * CURSOR_MOVE uses
248  *    crtc
249  *    x
250  *    y
251  */
252 struct drm_mode_cursor {
253 	uint32_t flags;
254 	uint32_t crtc_id;
255 	int32_t x;
256 	int32_t y;
257 	uint32_t width;
258 	uint32_t height;
259 	/* driver specific handle */
260 	uint32_t handle;
261 };
262 
263 struct drm_mode_crtc_lut {
264 	uint32_t crtc_id;
265 	uint32_t gamma_size;
266 
267 	/* pointers to arrays */
268 	uint64_t red;
269 	uint64_t green;
270 	uint64_t blue;
271 };
272 
273 #endif
274