1 /* $NetBSD: dcn20_dccg.h,v 1.2 2021/12/18 23:45:03 riastradh Exp $ */ 2 3 /* 4 * Copyright 2018 Advanced Micro Devices, Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: AMD 25 * 26 */ 27 28 #ifndef __DCN20_DCCG_H__ 29 #define __DCN20_DCCG_H__ 30 31 #include "dccg.h" 32 33 #define DCCG_COMMON_REG_LIST_DCN_BASE() \ 34 SR(DPPCLK_DTO_CTRL),\ 35 DCCG_SRII(DTO_PARAM, DPPCLK, 0),\ 36 DCCG_SRII(DTO_PARAM, DPPCLK, 1),\ 37 DCCG_SRII(DTO_PARAM, DPPCLK, 2),\ 38 DCCG_SRII(DTO_PARAM, DPPCLK, 3),\ 39 SR(REFCLK_CNTL) 40 41 #define DCCG_REG_LIST_DCN2() \ 42 DCCG_COMMON_REG_LIST_DCN_BASE(),\ 43 DCCG_SRII(DTO_PARAM, DPPCLK, 4),\ 44 DCCG_SRII(DTO_PARAM, DPPCLK, 5) 45 46 #define DCCG_SF(reg_name, field_name, post_fix)\ 47 .field_name = reg_name ## __ ## field_name ## post_fix 48 49 #define DCCG_SFI(reg_name, field_name, field_prefix, inst, post_fix)\ 50 .field_prefix ## _ ## field_name[inst] = reg_name ## __ ## field_prefix ## inst ## _ ## field_name ## post_fix 51 52 #define DCCG_COMMON_MASK_SH_LIST_DCN_COMMON_BASE(mask_sh) \ 53 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 0, mask_sh),\ 54 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 0, mask_sh),\ 55 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 1, mask_sh),\ 56 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 1, mask_sh),\ 57 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 2, mask_sh),\ 58 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 2, mask_sh),\ 59 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 3, mask_sh),\ 60 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 3, mask_sh),\ 61 DCCG_SF(DPPCLK0_DTO_PARAM, DPPCLK0_DTO_PHASE, mask_sh),\ 62 DCCG_SF(DPPCLK0_DTO_PARAM, DPPCLK0_DTO_MODULO, mask_sh),\ 63 DCCG_SF(REFCLK_CNTL, REFCLK_CLOCK_EN, mask_sh),\ 64 DCCG_SF(REFCLK_CNTL, REFCLK_SRC_SEL, mask_sh) 65 66 #define DCCG_MASK_SH_LIST_DCN2(mask_sh) \ 67 DCCG_COMMON_MASK_SH_LIST_DCN_COMMON_BASE(mask_sh),\ 68 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 4, mask_sh),\ 69 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 4, mask_sh),\ 70 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 5, mask_sh),\ 71 DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 5, mask_sh) 72 73 #define DCCG_REG_FIELD_LIST(type) \ 74 type DPPCLK0_DTO_PHASE;\ 75 type DPPCLK0_DTO_MODULO;\ 76 type DPPCLK_DTO_ENABLE[6];\ 77 type DPPCLK_DTO_DB_EN[6];\ 78 type REFCLK_CLOCK_EN;\ 79 type REFCLK_SRC_SEL; 80 81 struct dccg_shift { 82 DCCG_REG_FIELD_LIST(uint8_t) 83 }; 84 85 struct dccg_mask { 86 DCCG_REG_FIELD_LIST(uint32_t) 87 }; 88 89 struct dccg_registers { 90 uint32_t DPPCLK_DTO_CTRL; 91 uint32_t DPPCLK_DTO_PARAM[6]; 92 uint32_t REFCLK_CNTL; 93 }; 94 95 struct dcn_dccg { 96 struct dccg base; 97 const struct dccg_registers *regs; 98 const struct dccg_shift *dccg_shift; 99 const struct dccg_mask *dccg_mask; 100 }; 101 102 void dccg2_update_dpp_dto(struct dccg *dccg, int dpp_inst, int req_dppclk); 103 104 void dccg2_get_dccg_ref_freq(struct dccg *dccg, 105 unsigned int xtalin_freq_inKhz, 106 unsigned int *dccg_ref_freq_inKhz); 107 108 void dccg2_init(struct dccg *dccg); 109 110 struct dccg *dccg2_create( 111 struct dc_context *ctx, 112 const struct dccg_registers *regs, 113 const struct dccg_shift *dccg_shift, 114 const struct dccg_mask *dccg_mask); 115 116 void dcn_dccg_destroy(struct dccg **dccg); 117 118 #endif //__DCN20_DCCG_H__ 119