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Searched defs:DCIO_GPU_TIMER_READ_SELECT_UPPER_D1_V_UPDATE (Results 1 – 4 of 4) sorted by relevance

/dflybsd-src/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_enum.h419 DCIO_GPU_TIMER_READ_SELECT_UPPER_D1_V_UPDATE = 0x1, enumerator
H A Ddce_11_0_enum.h1184 DCIO_GPU_TIMER_READ_SELECT_UPPER_D1_V_UPDATE = 0x1, enumerator
H A Ddce_11_2_enum.h1591 DCIO_GPU_TIMER_READ_SELECT_UPPER_D1_V_UPDATE = 0x1, enumerator
/dflybsd-src/sys/dev/drm/amd/include/
H A Dvega10_enum.h12209 DCIO_GPU_TIMER_READ_SELECT_UPPER_D1_V_UPDATE = 0x00000001, enumerator