/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86FlagsCopyLowering.cpp | 771 unsigned &CondReg = CondRegs[Cond]; in getCondOrInverseInReg() local 827 unsigned &CondReg = CondRegs[Cond]; in rewriteArithmetic() local 854 unsigned CondReg; in rewriteCMov() local 880 unsigned CondReg; in rewriteFCMov() local 922 unsigned CondReg; in rewriteCondJmp() local 958 unsigned &CondReg = CondRegs[Cond]; in rewriteSetCC() local
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H A D | X86FastISel.cpp | 2120 Register CondReg = getRegForValue(Cond); in X86FastEmitCMoveSelect() local 2318 Register CondReg = getRegForValue(Cond); in X86FastEmitPseudoSelect() local
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H A D | X86InstructionSelector.cpp | 1363 const Register CondReg = I.getOperand(0).getReg(); in selectCondBranch() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | SIPreEmitPeephole.cpp | 81 const unsigned CondReg = TRI->getVCC(); in optimizeVccBranch() local
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H A D | SIOptimizeExecMaskingPreRA.cpp | 39 MCRegister CondReg; member in __anonb4c9c4b40111::SIOptimizeExecMaskingPreRA
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H A D | AMDGPURegisterBankInfo.cpp | 817 Register CondReg; in executeInWaterfallLoop() local 2225 Register CondReg = MI.getOperand(0).getReg(); in applyMappingImpl() local
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H A D | SIInstrInfo.cpp | 2412 static void preserveCondRegFlags(MachineOperand &CondReg, in preserveCondRegFlags() 2468 MachineOperand &CondReg = CondBr->getOperand(1); in insertBranch() local 5147 Register CondReg = AMDGPU::NoRegister; in emitLoadSRsrcFromVGPRLoop() local
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H A D | AMDGPUISelDAGToDAG.cpp | 2275 Register CondReg = UseSCCBr ? AMDGPU::SCC : TRI->getVCC(); in SelectBRCOND() local
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H A D | AMDGPUMachineCFGStructurizer.cpp | 1874 Register CondReg = Cond[0].getReg(); in ensureCondIsNotKilled() local
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H A D | AMDGPUInstructionSelector.cpp | 2430 Register CondReg = CondOp.getReg(); in selectG_BRCOND() local
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H A D | SIISelLowering.cpp | 3509 Register CondReg = MRI.createVirtualRegister(BoolRC); in emitLoadM0FromVGPRLoop() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyFastISel.cpp | 912 unsigned CondReg = getRegForI1Value(Select->getCondition(), Not); in selectSelect() local 1312 unsigned CondReg = getRegForI1Value(Br->getCondition(), Not); in selectBr() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
H A D | MipsFastISel.cpp | 967 unsigned CondReg = getRegForValue(BI->getCondition()); in selectBranch() local 1046 unsigned CondReg = getRegForValue(Cond); in selectSelect() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 2457 unsigned CondReg = getRegForValue(BI->getCondition()); in selectBranch() local 2471 unsigned CondReg = getRegForValue(BI->getCondition()); in selectBranch() local 2693 unsigned CondReg = getRegForValue(Cond); in selectSelect() local 2742 unsigned CondReg = getRegForValue(Cond); in selectSelect() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
H A D | ARMInstructionSelector.cpp | 774 auto CondReg = MIB.getReg(1); in selectSelect() local
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H A D | ARMFastISel.cpp | 1607 unsigned CondReg = getRegForValue(I->getOperand(0)); in SelectSelect() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
H A D | PPCFastISel.cpp | 786 unsigned CondReg = createResultReg(&PPC::CRRCRegClass); in SelectBranch() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64InstructionSelector.cpp | 1583 Register CondReg = I.getOperand(0).getReg(); in selectCompareBranch() local 3093 const Register CondReg = I.getOperand(1).getReg(); in select() local
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
H A D | LegalizerHelper.cpp | 3515 Register CondReg = MI.getOperand(1).getReg(); in fewerElementsVectorSelect() local 5089 Register CondReg = MI.getOperand(1).getReg(); in narrowScalarSelect() local
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