| /llvm-project/clang/lib/Analysis/FlowSensitive/Models/ |
| H A D | UncheckedOptionalAccessModel.cpp | 652 auto *CmpValue = &forceBoolValue(Env, *CmpExpr); transferOptionalAndOptionalCmp() local
668 auto *CmpValue = &forceBoolValue(Env, *CmpExpr); transferOptionalAndValueCmp() local
681 auto *CmpValue = &forceBoolValue(Env, *CmpExpr); transferOptionalAndNulloptCmp() local
[all...] |
| /llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.cpp | 286 int64_t /*CmpMask*/, int64_t CmpValue, in optimizeCompareInstr() argument
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| /llvm-project/llvm/lib/CodeGen/ |
| H A D | PeepholeOptimizer.cpp | 671 int64_t CmpMask, CmpValue; optimizeCmpInstr() local
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| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonHardwareLoops.cpp | 1453 int64_t CmpMask = 0, CmpValue = 0; loopCountMayWrapOrUnderFlow() local
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| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 1537 optimizeCompareInstr(MachineInstr & CmpInstr,Register SrcReg,Register SrcReg2,int64_t CmpMask,int64_t CmpValue,const MachineRegisterInfo * MRI) const optimizeCompareInstr() argument
1846 canCmpInstrBeRemoved(MachineInstr & MI,MachineInstr & CmpInstr,int CmpValue,const TargetRegisterInfo & TRI,SmallVectorImpl<MachineInstr * > & CCUseInstrs,bool & IsInvertCC) canCmpInstrBeRemoved() argument
1940 removeCmpToZeroOrOne(MachineInstr & CmpInstr,unsigned SrcReg,int CmpValue,const MachineRegisterInfo & MRI) const removeCmpToZeroOrOne() argument
[all...] |
| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 3016 optimizeCompareInstr(MachineInstr & CmpInstr,Register SrcReg,Register SrcReg2,int64_t CmpMask,int64_t CmpValue,const MachineRegisterInfo * MRI) const optimizeCompareInstr() argument
3303 int64_t CmpMask, CmpValue; shouldSink() local
[all...] |
| /llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 2768 int64_t CmpMask, CmpValue; optimizeCmpPostRA() local
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| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 5205 optimizeCompareInstr(MachineInstr & CmpInstr,Register SrcReg,Register SrcReg2,int64_t CmpMask,int64_t CmpValue,const MachineRegisterInfo * MRI) const optimizeCompareInstr() argument
[all...] |
| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 9760 optimizeCompareInstr(MachineInstr & CmpInstr,Register SrcReg,Register SrcReg2,int64_t CmpMask,int64_t CmpValue,const MachineRegisterInfo * MRI) const optimizeCompareInstr() argument
|