1 #define NSNAME 8 2 #define NSYM 50 3 #define NREG 16 4 5 #define NOPROF (1<<0) 6 #define DUPOK (1<<1) 7 #define ALLTHUMBS (1<<2) 8 9 #define REGRET 0 10 #define REGARG 0 11 /* compiler allocates R1 up as temps */ 12 /* compiler allocates register variables R2 up */ 13 #define REGMIN 2 14 #define REGMAX 8 15 #define REGEXT 10 16 /* compiler allocates external registers R10 down */ 17 #define REGTMP 11 18 #define REGSB 12 19 #define REGSP 13 20 #define REGLINK 14 21 #define REGPC 15 22 23 #define REGTMPT 7 /* used by the loader for thumb code */ 24 25 #define NFREG 8 26 #define FREGRET 0 27 #define FREGEXT 7 28 #define FREGTMP 15 29 /* compiler allocates register variables F0 up */ 30 /* compiler allocates external registers F7 down */ 31 32 enum as 33 { 34 AXXX, 35 36 AAND, 37 AEOR, 38 ASUB, 39 ARSB, 40 AADD, 41 AADC, 42 ASBC, 43 ARSC, 44 ATST, 45 ATEQ, 46 ACMP, 47 ACMN, 48 AORR, 49 ABIC, 50 51 AMVN, 52 53 AB, 54 ABL, 55 56 /* 57 * Do not reorder or fragment the conditional branch 58 * opcodes, or the predication code will break 59 */ 60 ABEQ, 61 ABNE, 62 ABCS, 63 ABHS, 64 ABCC, 65 ABLO, 66 ABMI, 67 ABPL, 68 ABVS, 69 ABVC, 70 ABHI, 71 ABLS, 72 ABGE, 73 ABLT, 74 ABGT, 75 ABLE, 76 77 AMOVWD, 78 AMOVWF, 79 AMOVDW, 80 AMOVFW, 81 AMOVFD, 82 AMOVDF, 83 AMOVF, 84 AMOVD, 85 86 ACMPF, 87 ACMPD, 88 AADDF, 89 AADDD, 90 ASUBF, 91 ASUBD, 92 AMULF, 93 AMULD, 94 ADIVF, 95 ADIVD, 96 97 ASRL, 98 ASRA, 99 ASLL, 100 AMULU, 101 ADIVU, 102 AMUL, 103 ADIV, 104 AMOD, 105 AMODU, 106 107 AMOVB, 108 AMOVBU, 109 AMOVH, 110 AMOVHU, 111 AMOVW, 112 AMOVM, 113 ASWPBU, 114 ASWPW, 115 116 ANOP, 117 ARFE, 118 ASWI, 119 AMULA, 120 121 ADATA, 122 AGLOBL, 123 AGOK, 124 AHISTORY, 125 ANAME, 126 ARET, 127 ATEXT, 128 AWORD, 129 ADYNT, 130 AINIT, 131 ABCASE, 132 ACASE, 133 134 AEND, 135 136 AMULL, 137 AMULAL, 138 AMULLU, 139 AMULALU, 140 141 ABX, 142 ABXRET, 143 ADWORD, 144 145 ASIGNAME, 146 147 ASQRTF, 148 ASQRTD, 149 150 ALDREX, 151 ASTREX, 152 153 ALDREXD, 154 ASTREXD, 155 156 AERET, 157 AWFE, 158 AWFI, 159 160 ACPS, 161 ACPSID, 162 ACPSIE, 163 164 ADMB, 165 ADSB, 166 AISB, 167 168 ACLZ, 169 170 ACLREX, 171 ALDREXB, 172 ASTREXB, 173 ALDREXH, 174 ASTREXH, 175 176 AABSF, 177 AABSD, 178 ANEGF, 179 ANEGD, 180 181 AMLAF, 182 AMLAD, 183 AMLSF, 184 AMLSD, 185 ANMULF, 186 ANMULD, 187 ANMLAF, 188 ANMLAD, 189 ANMLSF, 190 ANMLSD, 191 192 AMOVWFU, 193 AMOVWDU, 194 AMOVFWU, 195 AMOVDWU, 196 197 AMOVMF, 198 AMOVMD, 199 APOPF, 200 APOPD, 201 APUSHF, 202 APUSHD, 203 204 ALAST, 205 }; 206 207 /* scond byte */ 208 #define C_SCOND ((1<<4)-1) 209 #define C_SBIT (1<<4) 210 #define C_PBIT (1<<5) 211 #define C_WBIT (1<<6) 212 #define C_FBIT (1<<7) /* psr flags-only */ 213 #define C_UBIT (1<<7) /* up bit */ 214 215 /* type/name */ 216 #define D_GOK 0 217 #define D_NONE 1 218 219 /* type */ 220 #define D_BRANCH (D_NONE+1) 221 #define D_OREG (D_NONE+2) 222 #define D_CONST (D_NONE+7) 223 #define D_FCONST (D_NONE+8) 224 #define D_SCONST (D_NONE+9) 225 #define D_PSR (D_NONE+10) 226 #define D_REG (D_NONE+12) 227 #define D_FREG (D_NONE+13) /* Fn = S(2*n) or Dn depending on op */ 228 #define D_FILE (D_NONE+16) 229 #define D_OCONST (D_NONE+17) 230 #define D_FILE1 (D_NONE+18) 231 232 #define D_SHIFT (D_NONE+19) 233 #define D_FPCR (D_NONE+20) 234 #define D_REGREG (D_NONE+21) 235 #define D_ADDR (D_NONE+22) 236 #define D_VFPCR (D_NONE+23) 237 #define D_SFREG (D_NONE+24) /* single-precision register Sn */ 238 #define D_QREG (D_NONE+25) 239 240 /* name */ 241 #define D_EXTERN (D_NONE+3) 242 #define D_STATIC (D_NONE+4) 243 #define D_AUTO (D_NONE+5) 244 #define D_PARAM (D_NONE+6) 245 246 /* 247 * this is the ranlib header 248 */ 249 #define SYMDEF "__.SYMDEF" 250 251 /* 252 * this is the simulated IEEE floating point 253 */ 254 typedef struct ieee Ieee; 255 struct ieee 256 { 257 long l; /* contains ls-man 0xffffffff */ 258 long h; /* contains sign 0x80000000 259 exp 0x7ff00000 260 ms-man 0x000fffff */ 261 }; 262