1 /* $NetBSD: ti_lcdcreg.h,v 1.1 2019/11/03 22:59:06 jmcneill Exp $ */ 2 /*- 3 * Copyright 2013 Oleksandr Tymoshenko <gonzo@freebsd.org> 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #define LCD_PID 0x00 29 #define LCD_CTRL 0x04 30 #define CTRL_DIV_MASK 0xff 31 #define CTRL_DIV_SHIFT 8 32 #define CTRL_AUTO_UFLOW_RESTART (1 << 1) 33 #define CTRL_RASTER_MODE 1 34 #define CTRL_LIDD_MODE 0 35 #define LCD_LIDD_CTRL 0x0C 36 #define LCD_LIDD_CS0_CONF 0x10 37 #define LCD_LIDD_CS0_ADDR 0x14 38 #define LCD_LIDD_CS0_DATA 0x18 39 #define LCD_LIDD_CS1_CONF 0x1C 40 #define LCD_LIDD_CS1_ADDR 0x20 41 #define LCD_LIDD_CS1_DATA 0x24 42 #define LCD_RASTER_CTRL 0x28 43 #define RASTER_CTRL_TFT24_UNPACKED (1 << 26) 44 #define RASTER_CTRL_TFT24 (1 << 25) 45 #define RASTER_CTRL_STN565 (1 << 24) 46 #define RASTER_CTRL_TFTMAP (1 << 23) 47 #define RASTER_CTRL_NIBMODE (1 << 22) 48 #define RASTER_CTRL_PALMODE_PALETTE_AND_DATA (0 << 20) 49 #define RASTER_CTRL_PALMODE_PALETTE_ONLY (1 << 20) 50 #define RASTER_CTRL_PALMODE_DATA_ONLY (2 << 20) 51 #define RASTER_CTRL_REQDLY(v) ((v) << 12) 52 #define RASTER_CTRL_MONO8B (1 << 9) 53 #define RASTER_CTRL_RDORDER (1 << 8) 54 #define RASTER_CTRL_LCDTFT (1 << 7) 55 #define RASTER_CTRL_LCDBW (1 << 1) 56 #define RASTER_CTRL_LCDEN (1 << 0) 57 #define LCD_RASTER_TIMING_0 0x2C 58 #define RASTER_TIMING_0_HBP(v) ((((v) - 1) & 0xff) << 24) 59 #define RASTER_TIMING_0_HFP(v) ((((v) - 1) & 0xff) << 16) 60 #define RASTER_TIMING_0_HSW(v) ((((v) - 1) & 0x3f) << 10) 61 #define RASTER_TIMING_0_PPL(w) \ 62 (((((w) - 1) >> 7) & 0x8) | ((((w) - 1) >> 0) & 0x3f0)) 63 #define LCD_RASTER_TIMING_1 0x30 64 #define RASTER_TIMING_1_VBP(v) (((v) & 0xff) << 24) 65 #define RASTER_TIMING_1_VFP(v) (((v) & 0xff) << 16) 66 #define RASTER_TIMING_1_VSW(v) ((((v) - 1) & 0x3f) << 10) 67 #define RASTER_TIMING_1_LPP(h) ((((h) - 1) & 0x3ff) << 0) 68 #define LCD_RASTER_TIMING_2 0x34 69 #define RASTER_TIMING_2_HSW(v) (((((v) - 1) >> 6) & 0xf) << 27) 70 #define RASTER_TIMING_2_LPP(h) (((h) & 0x400) ? (1 << 26) : 0) 71 #define RASTER_TIMING_2_PHSVS (1 << 25) 72 #define RASTER_TIMING_2_PHSVS_RISE (1 << 24) 73 #define RASTER_TIMING_2_PHSVS_FALL (0 << 24) 74 #define RASTER_TIMING_2_IOE (1 << 23) 75 #define RASTER_TIMING_2_IPC (1 << 22) 76 #define RASTER_TIMING_2_IHS (1 << 21) 77 #define RASTER_TIMING_2_IVS (1 << 20) 78 #define RASTER_TIMING_2_ACBI(x) ((x) << 16) 79 #define RASTER_TIMING_2_ACB(x) ((x) << 8) 80 #define RASTER_TIMING_2_HBP(v) ((((v) - 1) >> 4) & 0x30) 81 #define RASTER_TIMING_2_HFP(v) ((((v) - 1) >> 8) & 0x3) 82 #define LCD_RASTER_SUBPANEL 0x38 83 #define LCD_RASTER_SUBPANEL2 0x3C 84 #define LCD_LCDDMA_CTRL 0x40 85 #define LCDDMA_CTRL_DMA_MASTER_PRIO_SHIFT 16 86 #define LCDDMA_CTRL_TH_FIFO_RDY_SHIFT 8 87 #define LCDDMA_CTRL_BURST_SIZE_SHIFT 4 88 #define LCDDMA_CTRL_BYTES_SWAP (1 << 3) 89 #define LCDDMA_CTRL_BE (1 << 1) 90 #define LCDDMA_CTRL_FB0_FB1 (1 << 0) 91 #define LCDDMA_CTRL_FB0_ONLY (0 << 0) 92 #define LCD_LCDDMA_FB0_BASE 0x44 93 #define LCD_LCDDMA_FB0_CEILING 0x48 94 #define LCD_LCDDMA_FB1_BASE 0x4C 95 #define LCD_LCDDMA_FB1_CEILING 0x50 96 #define LCD_SYSCONFIG 0x54 97 #define SYSCONFIG_STANDBY_FORCE (0 << 4) 98 #define SYSCONFIG_STANDBY_NONE (1 << 4) 99 #define SYSCONFIG_STANDBY_SMART (2 << 4) 100 #define SYSCONFIG_IDLE_FORCE (0 << 2) 101 #define SYSCONFIG_IDLE_NONE (1 << 2) 102 #define SYSCONFIG_IDLE_SMART (2 << 2) 103 #define LCD_IRQSTATUS_RAW 0x58 104 #define LCD_IRQSTATUS 0x5C 105 #define LCD_IRQENABLE_SET 0x60 106 #define LCD_IRQENABLE_CLEAR 0x64 107 #define IRQ_EOF1 (1 << 9) 108 #define IRQ_EOF0 (1 << 8) 109 #define IRQ_PL (1 << 6) 110 #define IRQ_FUF (1 << 5) 111 #define IRQ_ACB (1 << 3) 112 #define IRQ_SYNC_LOST (1 << 2) 113 #define IRQ_RASTER_DONE (1 << 1) 114 #define IRQ_FRAME_DONE (1 << 0) 115 #define LCD_CLKC_ENABLE 0x6C 116 #define CLKC_ENABLE_DMA (1 << 2) 117 #define CLKC_ENABLE_LIDD (1 << 1) 118 #define CLKC_ENABLE_CORE (1 << 0) 119 #define LCD_CLKC_RESET 0x70 120 #define CLKC_RESET_MAIN (1 << 3) 121 #define CLKC_RESET_DMA (1 << 2) 122 #define CLKC_RESET_LIDD (1 << 1) 123 #define CLKC_RESET_CORE (1 << 0) 124 125 /* 16-Entry Palette/Buffer Format */ 126 #define PALETTE_BPP_1 (0 << 12) 127 #define PALETTE_BPP_2 (1 << 12) 128 #define PALETTE_BPP_4 (2 << 12) 129 #define PALETTE_BPP_8 (3 << 12) 130 #define PALETTE_BPP_XX (4 << 12) 131 #define PALETTE_MONO(v) ((v) & 0xf) 132 #define PALETTE_RED(r) (((r) & 0xf) << 8) 133 #define PALETTE_GREEN(g) (((g) & 0xf) << 4) 134 #define PALETTE_BLUE(b) (((b) & 0xf) << 0) 135 #define PALETTE_COLOR(r, g, b) \ 136 (PALETTE_RED(r) | PALETTE_GREEN(g) | PALETTE_BLUE(b)) 137