1 //===-- X86TargetParser - Parser for X86 features ---------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file implements a target parser to recognise X86 hardware features. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #ifndef LLVM_TARGETPARSER_X86TARGETPARSER_H 14 #define LLVM_TARGETPARSER_X86TARGETPARSER_H 15 16 #include "llvm/ADT/ArrayRef.h" 17 #include "llvm/ADT/StringMap.h" 18 #include <array> 19 20 namespace llvm { 21 template <typename T> class SmallVectorImpl; 22 class StringRef; 23 24 namespace X86 { 25 26 // This should be kept in sync with libcc/compiler-rt as its included by clang 27 // as a proxy for what's in libgcc/compiler-rt. 28 enum ProcessorVendors : unsigned { 29 VENDOR_DUMMY, 30 #define X86_VENDOR(ENUM, STRING) \ 31 ENUM, 32 #include "llvm/TargetParser/X86TargetParser.def" 33 VENDOR_OTHER 34 }; 35 36 // This should be kept in sync with libcc/compiler-rt as its included by clang 37 // as a proxy for what's in libgcc/compiler-rt. 38 enum ProcessorTypes : unsigned { 39 CPU_TYPE_DUMMY, 40 #define X86_CPU_TYPE(ENUM, STRING) \ 41 ENUM, 42 #include "llvm/TargetParser/X86TargetParser.def" 43 CPU_TYPE_MAX 44 }; 45 46 // This should be kept in sync with libcc/compiler-rt as its included by clang 47 // as a proxy for what's in libgcc/compiler-rt. 48 enum ProcessorSubtypes : unsigned { 49 CPU_SUBTYPE_DUMMY, 50 #define X86_CPU_SUBTYPE(ENUM, STRING) \ 51 ENUM, 52 #include "llvm/TargetParser/X86TargetParser.def" 53 CPU_SUBTYPE_MAX 54 }; 55 56 // This should be kept in sync with libcc/compiler-rt as it should be used 57 // by clang as a proxy for what's in libgcc/compiler-rt. 58 enum ProcessorFeatures { 59 #define X86_FEATURE(ENUM, STRING) FEATURE_##ENUM, 60 #include "llvm/TargetParser/X86TargetParser.def" 61 CPU_FEATURE_MAX, 62 63 #define X86_MICROARCH_LEVEL(ENUM, STRING, PRIORITY) FEATURE_##ENUM = PRIORITY, 64 #include "llvm/TargetParser/X86TargetParser.def" 65 }; 66 67 enum CPUKind { 68 CK_None, 69 CK_i386, 70 CK_i486, 71 CK_WinChipC6, 72 CK_WinChip2, 73 CK_C3, 74 CK_i586, 75 CK_Pentium, 76 CK_PentiumMMX, 77 CK_PentiumPro, 78 CK_i686, 79 CK_Pentium2, 80 CK_Pentium3, 81 CK_PentiumM, 82 CK_C3_2, 83 CK_Yonah, 84 CK_Pentium4, 85 CK_Prescott, 86 CK_Nocona, 87 CK_Core2, 88 CK_Penryn, 89 CK_Bonnell, 90 CK_Silvermont, 91 CK_Goldmont, 92 CK_GoldmontPlus, 93 CK_Tremont, 94 CK_Gracemont, 95 CK_Nehalem, 96 CK_Westmere, 97 CK_SandyBridge, 98 CK_IvyBridge, 99 CK_Haswell, 100 CK_Broadwell, 101 CK_SkylakeClient, 102 CK_SkylakeServer, 103 CK_Cascadelake, 104 CK_Cooperlake, 105 CK_Cannonlake, 106 CK_IcelakeClient, 107 CK_Rocketlake, 108 CK_IcelakeServer, 109 CK_Tigerlake, 110 CK_SapphireRapids, 111 CK_Alderlake, 112 CK_Raptorlake, 113 CK_Meteorlake, 114 CK_Arrowlake, 115 CK_ArrowlakeS, 116 CK_Lunarlake, 117 CK_Pantherlake, 118 CK_Sierraforest, 119 CK_Grandridge, 120 CK_Graniterapids, 121 CK_GraniterapidsD, 122 CK_Emeraldrapids, 123 CK_Clearwaterforest, 124 CK_Diamondrapids, 125 CK_KNL, 126 CK_KNM, 127 CK_Lakemont, 128 CK_K6, 129 CK_K6_2, 130 CK_K6_3, 131 CK_Athlon, 132 CK_AthlonXP, 133 CK_K8, 134 CK_K8SSE3, 135 CK_AMDFAM10, 136 CK_BTVER1, 137 CK_BTVER2, 138 CK_BDVER1, 139 CK_BDVER2, 140 CK_BDVER3, 141 CK_BDVER4, 142 CK_ZNVER1, 143 CK_ZNVER2, 144 CK_ZNVER3, 145 CK_ZNVER4, 146 CK_ZNVER5, 147 CK_x86_64, 148 CK_x86_64_v2, 149 CK_x86_64_v3, 150 CK_x86_64_v4, 151 CK_Geode, 152 }; 153 154 /// Parse \p CPU string into a CPUKind. Will only accept 64-bit capable CPUs if 155 /// \p Only64Bit is true. 156 CPUKind parseArchX86(StringRef CPU, bool Only64Bit = false); 157 CPUKind parseTuneCPU(StringRef CPU, bool Only64Bit = false); 158 159 /// Provide a list of valid CPU names. If \p Only64Bit is true, the list will 160 /// only contain 64-bit capable CPUs. 161 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values, 162 bool Only64Bit = false); 163 /// Provide a list of valid -mtune names. 164 void fillValidTuneCPUList(SmallVectorImpl<StringRef> &Values, 165 bool Only64Bit = false); 166 167 /// Get the key feature prioritizing target multiversioning. 168 ProcessorFeatures getKeyFeature(CPUKind Kind); 169 170 /// Fill in the features that \p CPU supports into \p Features. 171 /// "+" will be append in front of each feature if NeedPlus is true. 172 void getFeaturesForCPU(StringRef CPU, SmallVectorImpl<StringRef> &Features, 173 bool NeedPlus = false); 174 175 /// Set or clear entries in \p Features that are implied to be enabled/disabled 176 /// by the provided \p Feature. 177 void updateImpliedFeatures(StringRef Feature, bool Enabled, 178 StringMap<bool> &Features); 179 180 char getCPUDispatchMangling(StringRef Name); 181 bool validateCPUSpecificCPUDispatch(StringRef Name); 182 std::array<uint32_t, 4> getCpuSupportsMask(ArrayRef<StringRef> FeatureStrs); 183 unsigned getFeaturePriority(ProcessorFeatures Feat); 184 185 } // namespace X86 186 } // namespace llvm 187 188 #endif 189