| /netbsd-src/external/gpl3/gdb/dist/sim/testsuite/bfin/ |
| H A D | a9.s | 18 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define
19 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define
20 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define
21 CC = V; R7 = CC; DBGA ( R7.L , 0x0 ); define
22 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define
32 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define
33 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define
34 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define
35 CC = V; R7 = CC; DBGA ( R7.L , 0x0 ); define
36 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define
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| H A D | a10.s | 19 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define
20 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define
21 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define
22 CC = V; R7 = CC; DBGA ( R7.L , 0x0 ); define
23 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define
33 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define
34 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define
35 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define
36 CC = V; R7 = CC; DBGA ( R7.L , 0x0 ); define
37 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define
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| H A D | s14.s | 23 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define
24 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define
25 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define
26 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define
27 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define
39 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define
40 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define
41 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define
42 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define
43 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define
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| H A D | s13.s | 18 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define
19 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define
20 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define
21 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define
22 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define
33 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define
34 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define
35 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define
36 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define
37 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define
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| H A D | s9.s | 17 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define
18 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define
19 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define
20 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define
21 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define
30 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define
31 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define
32 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define
33 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define
34 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define
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| H A D | s18.s | 21 CC = AZ; R7 = CC; DBGA ( R7.L , 0x1 ); define
22 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define
23 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define
24 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define
25 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define
36 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define
37 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define
38 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define
39 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define
40 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define
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| H A D | s19.s | 22 CC = AZ; R7 = CC; DBGA ( R7.L , 0x1 ); define
23 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define
24 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define
25 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define
26 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define
38 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define
39 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define
40 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define
41 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define
42 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define
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| H A D | a5.s | 25 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define
26 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define
27 CC = V; R7 = CC; DBGA ( R7.L , 0x1 ); define
28 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define
41 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define
42 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define
43 CC = V; R7 = CC; DBGA ( R7.L , 0x1 ); define
44 CC = AC0; R7 = CC; DBGA ( R7.L , 0x1 ); define
57 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define
58 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define
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| H A D | a6.s | 22 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define
23 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define
24 CC = V; R7 = CC; DBGA ( R7.L , 0x1 ); define
25 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define
37 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define
38 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define
39 CC = V; R7 = CC; DBGA ( R7.L , 0x1 ); define
40 CC = AC0; R7 = CC; DBGA ( R7.L , 0x1 ); define
52 CC = AZ; R5 = CC; DBGA ( R5.L , 0x1 ); define
53 CC = AN; R5 = CC; DBGA ( R5.L , 0x0 ); define
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| H A D | dsp_a4.s | 22 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define
23 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define
24 CC = V; R7 = CC; DBGA ( R7.L , 0x1 ); define
25 CC = VS; R7 = CC; DBGA ( R7.L , 0x1 ); define
26 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define
36 CC = AZ; R7 = CC; DBGA ( R7.L , 0x1 ); define
37 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define
38 CC = V; R7 = CC; DBGA ( R7.L , 0x1 ); define
39 CC = AC0; R7 = CC; DBGA ( R7.L , 0x1 ); define
51 CC = AZ; R7 = CC; DBGA ( R7.L , 0x1 ); define
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| H A D | m2.s | 36 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define
37 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define
38 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define
39 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define
40 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define
67 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define
68 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define
69 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define
70 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define
71 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define
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| H A D | dsp_a7.s | 23 CC = AZ; R7 = CC; DBGA ( R7.L , 0x1 ); define
24 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define
25 CC = V; R7 = CC; DBGA ( R7.L , 0x0 ); define
26 CC = AC0; R7 = CC; DBGA ( R7.L , 0x1 ); define
38 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define
39 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define
40 CC = V; R7 = CC; DBGA ( R7.L , 0x1 ); define
41 CC = AC0; R7 = CC; DBGA ( R7.L , 0x1 ); define
53 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define
54 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define
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| H A D | c_ccflag_pr_imm3.s | 23 CC = P1 == 1; define
25 CC = P1 < 1; define
27 CC = P1 <= 1; define
29 CC = P2 == 2; define
31 CC = P2 < 2; define
33 CC = P2 <= 2; define
42 CC = P3 == 3; define
44 CC = P3 < 3; define
46 CC = P3 <= 3; define
48 CC = P4 == 1; define
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| H A D | c_ccflag_pr_imm3_uu.s | 25 CC = P1 == 1; define
27 CC = P1 < 1 (IU); define
29 CC = P1 <= 1 (IU); define
31 CC = P2 == 2; define
33 CC = P2 < 2 (IU); define
35 CC = P2 <= 2 (IU); define
44 CC = P3 == 3; define
46 CC = P3 < 3 (IU); define
48 CC = P3 <= 3 (IU); define
50 CC = P4 == 3; define
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| H A D | c_logi2op_bittst.s | 20 CC = BITTST ( R0 , 0 ); /* cc = 0 */ define
23 CC = BITTST ( R0 , 0 ); /* cc = 1 */ define
26 CC = BITTST ( R0 , 0 ); /* cc = 1 */ define
29 CC = BITTST ( R0 , 0 ); /* cc = 1 */ define
37 CC = BITTST ( R1 , 1 ); /* cc = 0 */ define
40 CC = BITTST ( R1 , 1 ); /* cc = 1 */ define
43 CC = BITTST ( R1 , 1 ); /* cc = 1 */ define
46 CC = BITTST ( R1 , 1 ); /* cc = 1 */ define
54 CC = BITTST ( R2 , 2 ); /* cc = 0 */ define
57 CC = BITTST ( R2 , 2 ); /* cc = 1 */ define
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| H A D | c_logi2op_nbittst.s | 21 CC = ! BITTST( R0 , 0 ); /* cc = 0 */ define
24 CC = ! BITTST( R0 , 0 ); /* cc = 1 */ define
27 CC = ! BITTST( R0 , 0 ); /* cc = 1 */ define
30 CC = ! BITTST( R0 , 0 ); /* cc = 1 */ define
38 CC = ! BITTST( R1 , 1 ); /* cc = 0 */ define
41 CC = ! BITTST( R1 , 1 ); /* cc = 1 */ define
44 CC = ! BITTST( R1 , 1 ); /* cc = 1 */ define
47 CC = ! BITTST( R1 , 1 ); /* cc = 1 */ define
55 CC = ! BITTST( R2 , 2 ); /* cc = 0 */ define
58 CC = ! BITTST( R2 , 2 ); /* cc = 1 */ define
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| H A D | s15.s | 44 CC = AZ; R7 = CC; DBGA ( R7.L , 0x1 ); define
45 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define
60 CC = AZ; R7 = CC; DBGA ( R7.L , 0x1 ); define
61 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define
92 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define
93 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define
101 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define
102 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define
110 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define
111 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define
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| H A D | dsp_a8.s | 24 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define
25 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define
26 CC = V; R7 = CC; DBGA ( R7.L , 0x1 ); define
27 CC = AC0; R7 = CC; DBGA ( R7.L , 0x1 ); define
41 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define
42 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define
43 CC = V; R7 = CC; DBGA ( R7.L , 0x1 ); define
44 CC = AC0; R7 = CC; DBGA ( R7.L , 0x1 ); define
58 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define
59 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define
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| H A D | c_ccflag_a0a1.S | 25 CC = A0 == A1; define
27 CC = A0 < A1; define
32 CC = A0 <= A1; define
34 CC = A0 < A1; define
36 CC = A0 <= A1; define
44 CC = A0 == A1; define
46 CC = A0 < A1; define
48 CC = A0 <= A1; define
56 CC = A0 == A1; define
58 CC = A0 < A1; define
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| H A D | s4.s | 36 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define
37 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define
38 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define
39 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define
40 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define
48 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define
49 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define
50 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define
51 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define
52 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define
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| H A D | c_ccflag_dr_imm3.s | 23 CC = R0 == 1; define
25 CC = R0 < 1; define
30 CC = R0 <= 1; define
32 CC = R0 < 1; define
34 CC = R0 <= 1; define
41 CC = R1 == 1; define
43 CC = R1 < 1; define
45 CC = R1 <= 1; define
52 CC = R0 == 2; define
54 CC = R0 < 2; define
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| H A D | c_ccflag_dr_dr_uu.s | 23 CC = R0 == R1; define
25 CC = R0 < R1 (IU); define
27 CC = R0 <= R1 (IU); define
33 CC = R0 < R1 (IU); define
35 CC = R0 <= R1 (IU); define
41 CC = R3 == R2; define
43 CC = R3 < R2 (IU); define
45 CC = R3 <= R2 (IU); define
50 CC = R3 < R2 (IU); define
52 CC = R3 <= R2 (IU); define
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| H A D | c_ccflag_dr_dr.s | 23 CC = R0 == R1; define
25 CC = R0 < R1; define
27 CC = R0 <= R1; define
33 CC = R0 < R1; define
35 CC = R0 <= R1 (IU); define
41 CC = R3 == R2; define
43 CC = R3 < R2; define
45 CC = R3 <= R2; define
50 CC = R3 < R2 (IU); define
52 CC = R3 <= R2 (IU); define
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| H A D | c_ccflag_pr_pr.s | 27 CC = P2 == P1; define
30 CC = P2 < P1; define
32 CC = P2 <= P1; define
40 CC = P3 == P2; define
42 CC = P3 < P2; define
44 CC = P3 <= P2; define
50 CC = P2 == P3; define
52 CC = P2 < P3; define
54 CC = P2 <= P3; define
70 CC = P2 == P1; define
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| H A D | c_ccflag_dr_imm3_uu.s | 23 CC = R0 == 1; define
25 CC = R0 < 1; define
30 CC = R0 <= 1; define
32 CC = R0 < 1 (IU); define
34 CC = R0 <= 1 (IU); define
41 CC = R1 == 1; define
43 CC = R1 < 1 (IU); define
45 CC = R1 <= 1 (IU); define
52 CC = R0 == 2; define
54 CC = R0 < 2 (IU); define
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