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Searched defs:BaseOpc (Results 1 – 7 of 7) sorted by relevance

/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUBaseInfo.cpp379 getMTBUFOpcode(unsigned BaseOpc,unsigned Elements) getMTBUFOpcode() argument
409 getMUBUFOpcode(unsigned BaseOpc,unsigned Elements) getMUBUFOpcode() argument
/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMLoadStoreOptimizer.cpp703 int BaseOpc = isThumb2 ? (BaseKill && Base == ARM::SP ? ARM::t2ADDspImm CreateLoadStoreMulti() local
/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp957 unsigned BaseOpc = ISD::getVecReduceBaseOpcode(N->getOpcode()); ScalarizeVecOp_VECREDUCE_SEQ() local
6796 unsigned BaseOpc = ISD::getVecReduceBaseOpcode(Opc); WidenVecOp_VECREDUCE() local
6834 unsigned BaseOpc = ISD::getVecReduceBaseOpcode(Opc); WidenVecOp_VECREDUCE_SEQ() local
H A DDAGCombiner.cpp942 auto BaseOpc = ISD::getBaseOpcodeForVP(OpVal->getOpcode(), match() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FastISel.cpp2871 unsigned BaseOpc, CondCode; fastLowerIntrinsicCall() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp3202 unsigned BaseOpc = BO.first.getOpcode(); LowerUnalignedLoad() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp9120 unsigned BaseOpc; lowerVectorMaskVecReduction() local
9216 unsigned BaseOpc = ISD::getVecReduceBaseOpcode(Op.getOpcode()); lowerVECREDUCE() local