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Searched defs:Base1 (Results 1 – 10 of 10) sorted by relevance

/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64MachineScheduler.cpp39 const MachineOperand &Base1 = AArch64InstrInfo::getLdStBaseOp(MI1); in mayOverlapWrite() local
/freebsd-src/contrib/llvm-project/clang/lib/AST/
H A DASTStructuralEquivalence.cpp1692 for (CXXRecordDecl::base_class_iterator Base1 = D1CXX->bases_begin(), IsStructurallyEquivalent() local
1775 const CXXBaseSpecifier *Base1 = D1CXX->bases_begin(); IsStructurallyEquivalent() local
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H A DASTImporter.cpp2240 for (const auto &Base1 : FromCXX->bases()) { ImportDefinition() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfo.cpp2261 auto Base1 = MO1->getValue(); memOpsHaveSameBasePtr() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp2916 const MachineOperand *Base1 = nullptr, *Base2 = nullptr; shouldClusterMemOps() local
H A DPPCISelLowering.cpp13621 SDValue Base1 = Loc, Base2 = BaseLoc; isConsecutiveLSLoc() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp3217 SDValue Base1 = DAG.getMemBasePlusOffset( LowerUnalignedLoad() local
H A DHexagonISelLoweringHVX.cpp2977 SDValue Base1 = in SplitHvxMemOp() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.cpp537 auto Base1 = MO1->getValue(); memOpsHaveSameBasePtr() local
/freebsd-src/contrib/llvm-project/clang/lib/Sema/
H A DSemaChecking.cpp19077 Base1 = D1CXX->bases_begin(), isLayoutCompatibleStruct() local