| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dmub/src/ |
| H A D | amdgpu_dmub_dcn21.c | 39 #define BASE_INNER(seg) DMU_BASE__INST0_SEG##seg macro
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| H A D | amdgpu_dmub_dcn20.c | 40 #define BASE_INNER(seg) DCN_BASE__INST0_SEG##seg macro
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dce120/ |
| H A D | amdgpu_hw_translate_dce120.c | 49 #define BASE_INNER(seg) \ macro
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| H A D | amdgpu_hw_factory_dce120.c | 58 #define BASE_INNER(seg) \ macro
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dcn10/ |
| H A D | amdgpu_hw_translate_dcn10.c | 49 #define BASE_INNER(seg) \ macro
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| H A D | amdgpu_hw_factory_dcn10.c | 55 #define BASE_INNER(seg) \ macro
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dcn21/ |
| H A D | amdgpu_hw_translate_dcn21.c | 55 #define BASE_INNER(seg) DMU_BASE__INST0_SEG ## seg macro
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| H A D | amdgpu_hw_factory_dcn21.c | 56 #define BASE_INNER(seg) DMU_BASE__INST0_SEG ## seg macro
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dcn20/ |
| H A D | amdgpu_hw_translate_dcn20.c | 55 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
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| H A D | amdgpu_hw_factory_dcn20.c | 58 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_vmid.h | 33 #define BASE_INNER(seg) \ macro
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| H A D | dcn20_mmhubbub.h | 35 #define BASE_INNER(seg) \ macro
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| H A D | dcn20_dwb.h | 33 #define BASE_INNER(seg) \ macro
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| H A D | amdgpu_dcn20_resource.c | 379 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dce120/ |
| H A D | amdgpu_irq_service_dce120.c | 99 #define BASE_INNER(seg) \ macro
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dcn20/ |
| H A D | amdgpu_irq_service_dcn20.c | 181 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dcn10/ |
| H A D | amdgpu_irq_service_dcn10.c | 180 #define BASE_INNER(seg) \ macro
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dcn21/ |
| H A D | amdgpu_irq_service_dcn21.c | 177 #define BASE_INNER(seg) DMU_BASE__INST0_SEG ## seg macro
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dcn20/ |
| H A D | amdgpu_dcn20_clk_mgr.c | 53 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg macro
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_dwb.h | 32 #define BASE_INNER(seg) \ macro
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| H A D | amdgpu_dcn10_resource.c | 170 #define BASE_INNER(seg) \ macro
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce120/ |
| H A D | amdgpu_dce120_resource.c | 129 #define BASE_INNER(seg) \ macro
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/ |
| H A D | amdgpu_dcn21_resource.c | 290 #define BASE_INNER(seg) DMU_BASE__INST0_SEG ## seg macro
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